at91rm9200_inc.h

AT91RM9200的CPU-128Kbytes ROM内置软件服务程序源代码包：开发环境：ADS1.2 AT91RM9200-BasicROM_Services_BootLoader-ARM1_2

// ----------------------------------------------------------------------------
//          ATMEL Microcontroller Software Support  -  ROUSSET  -
// ----------------------------------------------------------------------------
//  The software is delivered "AS IS" without warranty or condition of any
//  kind, either express, implied or statutory. This includes without
//  limitation any warranty or condition with respect to merchantability or
//  fitness for any particular purpose, or against the infringements of
//  intellectual property rights of others.
// ----------------------------------------------------------------------------
// File Name           : AT91RM9200.h
// Object              : AT91RM9200 definitions
// Generated           : AT91 SW Application Group  07/04/2003 (11:05:05)
// 
// CVS Reference       : /AT91RM9200.pl/1.16/Fri Feb 07 09:29:50 2003//
// CVS Reference       : /SYS_AT91RM9200.pl/1.2/Fri Jan 17 11:44:36 2003//
// CVS Reference       : /MC_1760A.pl/1.1/Fri Aug 23 13:38:22 2002//
// CVS Reference       : /AIC_1796B.pl/1.1.1.1/Fri Jun 28 08:36:46 2002//
// CVS Reference       : /PMC_2636A.pl/1.1.1.1/Fri Jun 28 08:36:48 2002//
// CVS Reference       : /ST_1763B.pl/1.1/Fri Aug 23 13:41:42 2002//
// CVS Reference       : /RTC_1245D.pl/1.2/Fri Jan 31 11:19:06 2003//
// CVS Reference       : /PIO_1725D.pl/1.1.1.1/Fri Jun 28 08:36:46 2002//
// CVS Reference       : /DBGU_1754A.pl/1.4/Fri Jan 31 11:18:24 2003//
// CVS Reference       : /UDP_1765B.pl/1.3/Fri Aug 02 13:45:38 2002//
// CVS Reference       : /MCI_1764A.pl/1.2/Thu Nov 14 16:48:24 2002//
// CVS Reference       : /US_1739C.pl/1.2/Fri Jul 12 06:49:24 2002//
// CVS Reference       : /SPI_AT91RMxxxx.pl/1.3/Tue Nov 26 09:20:28 2002//
// CVS Reference       : /SSC_1762A.pl/1.2/Fri Nov 08 12:26:38 2002//
// CVS Reference       : /TC_1753B.pl/1.2/Fri Jan 31 11:19:54 2003//
// CVS Reference       : /TWI_1761B.pl/1.4/Fri Feb 07 09:30:06 2003//
// CVS Reference       : /PDC_1734B.pl/1.2/Thu Nov 21 15:38:22 2002//
// CVS Reference       : /UHP_xxxxA.pl/1.1/Mon Jul 22 11:21:58 2002//
// CVS Reference       : /EMAC_1794A.pl/1.4/Fri Jan 17 11:11:54 2003//
// CVS Reference       : /EBI_1759B.pl/1.10/Fri Jan 17 11:44:28 2003//
// CVS Reference       : /SMC_1783A.pl/1.3/Thu Oct 31 13:38:16 2002//
// CVS Reference       : /SDRC_1758B.pl/1.2/Thu Oct 03 12:04:40 2002//
// CVS Reference       : /BFC_1757B.pl/1.3/Thu Oct 31 13:38:00 2002//
// ----------------------------------------------------------------------------

// Hardware register definition

// *****************************************************************************
//              SOFTWARE API DEFINITION  FOR System Peripherals
// *****************************************************************************

// *****************************************************************************
//              SOFTWARE API DEFINITION  FOR Memory Controller Interface
// *****************************************************************************
// *** Register offset in AT91S_MC structure ***
#define MC_RCR          ( 0) // MC Remap Control Register
#define MC_ASR          ( 4) // MC Abort Status Register
#define MC_AASR         ( 8) // MC Abort Address Status Register
#define MC_PUIA         (16) // MC Protection Unit Area
#define MC_PUP          (80) // MC Protection Unit Peripherals
#define MC_PUER         (84) // MC Protection Unit Enable Register
// -------- MC_RCR : (MC Offset: 0x0) MC Remap Control Register -------- 
#define AT91C_MC_RCB              (0x1 <<  0) // (MC) Remap Command Bit
// -------- MC_ASR : (MC Offset: 0x4) MC Abort Status Register -------- 
#define AT91C_MC_UNDADD           (0x1 <<  0) // (MC) Undefined Addess Abort Status
#define AT91C_MC_MISADD           (0x1 <<  1) // (MC) Misaligned Addess Abort Status
#define AT91C_MC_MPU              (0x1 <<  2) // (MC) Memory protection Unit Abort Status
#define AT91C_MC_ABTSZ            (0x3 <<  8) // (MC) Abort Size Status
#define 	AT91C_MC_ABTSZ_BYTE                 (0x0 <<  8) // (MC) Byte
#define 	AT91C_MC_ABTSZ_HWORD                (0x1 <<  8) // (MC) Half-word
#define 	AT91C_MC_ABTSZ_WORD                 (0x2 <<  8) // (MC) Word
#define AT91C_MC_ABTTYP           (0x3 << 10) // (MC) Abort Type Status
#define 	AT91C_MC_ABTTYP_DATAR                (0x0 << 10) // (MC) Data Read
#define 	AT91C_MC_ABTTYP_DATAW                (0x1 << 10) // (MC) Data Write
#define 	AT91C_MC_ABTTYP_FETCH                (0x2 << 10) // (MC) Code Fetch
#define AT91C_MC_MST0             (0x1 << 16) // (MC) Master 0 Abort Source
#define AT91C_MC_MST1             (0x1 << 17) // (MC) Master 1 Abort Source
#define AT91C_MC_SVMST0           (0x1 << 24) // (MC) Saved Master 0 Abort Source
#define AT91C_MC_SVMST1           (0x1 << 25) // (MC) Saved Master 1 Abort Source
// -------- MC_PUIA : (MC Offset: 0x10) MC Protection Unit Area -------- 
#define AT91C_MC_PROT             (0x3 <<  0) // (MC) Protection
#define 	AT91C_MC_PROT_PNAUNA               (0x0) // (MC) Privilege: No Access, User: No Access
#define 	AT91C_MC_PROT_PRWUNA               (0x1) // (MC) Privilege: Read/Write, User: No Access
#define 	AT91C_MC_PROT_PRWURO               (0x2) // (MC) Privilege: Read/Write, User: Read Only
#define 	AT91C_MC_PROT_PRWURW               (0x3) // (MC) Privilege: Read/Write, User: Read/Write
#define AT91C_MC_SIZE             (0xF <<  4) // (MC) Internal Area Size
#define 	AT91C_MC_SIZE_1KB                  (0x0 <<  4) // (MC) Area size 1KByte
#define 	AT91C_MC_SIZE_2KB                  (0x1 <<  4) // (MC) Area size 2KByte
#define 	AT91C_MC_SIZE_4KB                  (0x2 <<  4) // (MC) Area size 4KByte
#define 	AT91C_MC_SIZE_8KB                  (0x3 <<  4) // (MC) Area size 8KByte
#define 	AT91C_MC_SIZE_16KB                 (0x4 <<  4) // (MC) Area size 16KByte
#define 	AT91C_MC_SIZE_32KB                 (0x5 <<  4) // (MC) Area size 32KByte
#define 	AT91C_MC_SIZE_64KB                 (0x6 <<  4) // (MC) Area size 64KByte
#define 	AT91C_MC_SIZE_128KB                (0x7 <<  4) // (MC) Area size 128KByte
#define 	AT91C_MC_SIZE_256KB                (0x8 <<  4) // (MC) Area size 256KByte
#define 	AT91C_MC_SIZE_512KB                (0x9 <<  4) // (MC) Area size 512KByte
#define 	AT91C_MC_SIZE_1MB                  (0xA <<  4) // (MC) Area size 1MByte
#define 	AT91C_MC_SIZE_2MB                  (0xB <<  4) // (MC) Area size 2MByte
#define 	AT91C_MC_SIZE_4MB                  (0xC <<  4) // (MC) Area size 4MByte
#define 	AT91C_MC_SIZE_8MB                  (0xD <<  4) // (MC) Area size 8MByte
#define 	AT91C_MC_SIZE_16MB                 (0xE <<  4) // (MC) Area size 16MByte
#define 	AT91C_MC_SIZE_64MB                 (0xF <<  4) // (MC) Area size 64MByte
#define AT91C_MC_BA               (0x3FFFF << 10) // (MC) Internal Area Base Address
// -------- MC_PUP : (MC Offset: 0x50) MC Protection Unit Peripheral -------- 
// -------- MC_PUER : (MC Offset: 0x54) MC Protection Unit Area -------- 
#define AT91C_MC_PUEB             (0x1 <<  0) // (MC) Protection Unit enable Bit

// *****************************************************************************
//              SOFTWARE API DEFINITION  FOR Real-time Clock Alarm and Parallel Load Interface
// *****************************************************************************
// *** Register offset in AT91S_RTC structure ***
#define RTC_CR          ( 0) // Control Register
#define RTC_MR          ( 4) // Mode Register
#define RTC_TIMR        ( 8) // Time Register
#define RTC_CALR        (12) // Calendar Register
#define RTC_TIMALR      (16) // Time Alarm Register
#define RTC_CALALR      (20) // Calendar Alarm Register
#define RTC_SR          (24) // Status Register
#define RTC_SCCR        (28) // Status Clear Command Register
#define RTC_IER         (32) // Interrupt Enable Register
#define RTC_IDR         (36) // Interrupt Disable Register
#define RTC_IMR         (40) // Interrupt Mask Register
#define RTC_VER         (44) // Valid Entry Register
// -------- RTC_CR : (RTC Offset: 0x0) RTC Control Register -------- 
#define AT91C_RTC_UPDTIM          (0x1 <<  0) // (RTC) Update Request Time Register
#define AT91C_RTC_UPDCAL          (0x1 <<  1) // (RTC) Update Request Calendar Register
#define AT91C_RTC_TIMEVSEL        (0x3 <<  8) // (RTC) Time Event Selection
#define 	AT91C_RTC_TIMEVSEL_MINUTE               (0x0 <<  8) // (RTC) Minute change.
#define 	AT91C_RTC_TIMEVSEL_HOUR                 (0x1 <<  8) // (RTC) Hour change.
#define 	AT91C_RTC_TIMEVSEL_DAY24                (0x2 <<  8) // (RTC) Every day at midnight.
#define 	AT91C_RTC_TIMEVSEL_DAY12                (0x3 <<  8) // (RTC) Every day at noon.
#define AT91C_RTC_CALEVSEL        (0x3 << 16) // (RTC) Calendar Event Selection
#define 	AT91C_RTC_CALEVSEL_WEEK                 (0x0 << 16) // (RTC) Week change (every Monday at time 00:00:00).
#define 	AT91C_RTC_CALEVSEL_MONTH                (0x1 << 16) // (RTC) Month change (every 01 of each month at time 00:00:00).
#define 	AT91C_RTC_CALEVSEL_YEAR                 (0x2 << 16) // (RTC) Year change (every January 1 at time 00:00:00).
// -------- RTC_MR : (RTC Offset: 0x4) RTC Mode Register -------- 
#define AT91C_RTC_HRMOD           (0x1 <<  0) // (RTC) 12-24 hour Mode
// -------- RTC_TIMR : (RTC Offset: 0x8) RTC Time Register -------- 
#define AT91C_RTC_SEC             (0x7F <<  0) // (RTC) Current Second
#define AT91C_RTC_MIN             (0x7F <<  8) // (RTC) Current Minute
#define AT91C_RTC_HOUR            (0x1F << 16) // (RTC) Current Hour
#define AT91C_RTC_AMPM            (0x1 << 22) // (RTC) Ante Meridiem, Post Meridiem Indicator
// -------- RTC_CALR : (RTC Offset: 0xc) RTC Calendar Register -------- 
#define AT91C_RTC_CENT            (0x3F <<  0) // (RTC) Current Century
#define AT91C_RTC_YEAR            (0xFF <<  8) // (RTC) Current Year
#define AT91C_RTC_MONTH           (0x1F << 16) // (RTC) Current Month
#define AT91C_RTC_DAY             (0x7 << 21) // (RTC) Current Day
#define AT91C_RTC_DATE            (0x3F << 24) // (RTC) Current Date
// -------- RTC_TIMALR : (RTC Offset: 0x10) RTC Time Alarm Register -------- 
#define AT91C_RTC_SECEN           (0x1 <<  7) // (RTC) Second Alarm Enable
#define AT91C_RTC_MINEN           (0x1 << 15) // (RTC) Minute Alarm
#define AT91C_RTC_HOUREN          (0x1 << 23) // (RTC) Current Hour
// -------- RTC_CALALR : (RTC Offset: 0x14) RTC Calendar Alarm Register -------- 
#define AT91C_RTC_MONTHEN         (0x1 << 23) // (RTC) Month Alarm Enable
#define AT91C_RTC_DATEEN          (0x1 << 31) // (RTC) Date Alarm Enable
// -------- RTC_SR : (RTC Offset: 0x18) RTC Status Register -------- 
#define AT91C_RTC_ACKUPD          (0x1 <<  0) // (RTC) Acknowledge for Update
#define AT91C_RTC_ALARM           (0x1 <<  1) // (RTC) Alarm Flag
#define AT91C_RTC_SECEV           (0x1 <<  2) // (RTC) Second Event
#define AT91C_RTC_TIMEV           (0x1 <<  3) // (RTC) Time Event
#define AT91C_RTC_CALEV           (0x1 <<  4) // (RTC) Calendar event
// -------- RTC_SCCR : (RTC Offset: 0x1c) RTC Status Clear Command Register -------- 
// -------- RTC_IER : (RTC Offset: 0x20) RTC Interrupt Enable Register -------- 
// -------- RTC_IDR : (RTC Offset: 0x24) RTC Interrupt Disable Register -------- 
// -------- RTC_IMR : (RTC Offset: 0x28) RTC Interrupt Mask Register -------- 
// -------- RTC_VER : (RTC Offset: 0x2c) RTC Valid Entry Register -------- 
#define AT91C_RTC_NVTIM           (0x1 <<  0) // (RTC) Non valid Time
#define AT91C_RTC_NVCAL           (0x1 <<  1) // (RTC) Non valid Calendar
#define AT91C_RTC_NVTIMALR        (0x1 <<  2) // (RTC) Non valid time Alarm
#define AT91C_RTC_NVCALALR        (0x1 <<  3) // (RTC) Nonvalid Calendar Alarm

// *****************************************************************************
//              SOFTWARE API DEFINITION  FOR System Timer Interface
// *****************************************************************************
// *** Register offset in AT91S_ST structure ***
#define ST_CR           ( 0) // Control Register
#define ST_PIMR         ( 4) // Period Interval Mode Register
#define ST_WDMR         ( 8) // Watchdog Mode Register
#define ST_RTMR         (12) // Real-time Mode Register
#define ST_SR           (16) // Status Register
#define ST_IER          (20) // Interrupt Enable Register
#define ST_IDR          (24) // Interrupt Disable Register
#define ST_IMR          (28) // Interrupt Mask Register
#define ST_RTAR         (32) // Real-time Alarm Register