ledv1_f398.h

模型控制

;-----------------------------------------------
;定义EM78P153器,RAM:0X10-0X2F
;-----------------------------------------------
iar  	  EQU 0 	 ;R0
TCC   	 EQU 1 	 ;R1
;-----------------------------------------------
pc    	 EQU 2  	;PC
;-----------------------------------------------
STATUS EQU 3  ;R3,STATUS REG
;===============================================
	RST	EQU 7 	 ;SET 1:WAKE UP FROM PIN CHANGE,0:OTHER
	GP1    EQU 6 	 ;
	GP0    EQU 5 	 ;
	T      EQU 4  	;WDT OVERFLOW
	P      EQU 3  	;POWER DOWN BIT
	Z      EQU 2  	;ZERO BIT
	DC     EQU 1  	;Aux CARRY BIT
	C      EQU 0  	;CARRY BIT
;-----------------------------------------------
RSR    EQU 4  ;REG SELECT REG---B0-B5,B6-B7:General Bit
;-----------------------------------------------
R5  		EQU		5 	 ;IO PORT 5
R6  		EQU		6  	;IO PORT 6
	key 	equ	0
	ac  	equ	1
	red     equ	5
	green   equ	4
	blue	equ	2
;-----------------------------------------------
	ram_0				equ		0x10	
	Sys_Status		   equ		ram_0+0	;
			F_Key		equ	0;key status
			F_Acl		equ	1;ac low
			F_Sta		equ	2;status change
			F_int		equ	3;int switch
			F_Dly		equ	4
	Sys_Status_T		 equ		ram_0+11
			F_1s		 equ	0
			F_2s		 equ	1
			F_4s		 equ	2
			F_5ms		equ	3
			F_10ms	   equ	4;time 10ms
			F_20ms	   equ	5;time 20ms
	Sys_Status_s		 equ		ram_0+13
			F_256s	   equ	0
			F_128s	   equ	1
			F_64s		equ	2
			F_38s		equ	3
			
			F_F256s	  equ	4
			F_F128s	  equ	5
			F_F64s	   equ	6
			F_F38s	   equ	7
	;--------------------------------------------
	high			 	equ		ram_0+1
	low			  	equ		ram_0+2
	high_T			   equ		ram_0+3
	low_t			    equ		ram_0+4
	r6_LH		 	   equ		ram_0+5
	L2H_port			 equ		ram_0+5
	r6_HL		 	   equ		ram_0+6
	H2L_port			 equ		ram_0+6
	pwm_temp			 equ		ram_0+7
	;--------------------------------------------		
	key_temp			 equ		ram_0+8
	key_buff			 equ		ram_0+9	
	AC_buff		      equ		ram_0+10		
	Time_buff			equ		ram_0+12	;10ms to 20ms		
	Time_T1			  equ		ram_0+14				
	Time_T2			  equ		ram_0+15
	Time_T3			  equ		ram_0+16
	PWM_T				equ		ram_0+18
	
	
	
	
	
	Times29			  equ		0x25
	Event29			  equ		0x27
	T_Count			  equ		0x28
	TempAC			   equ		0x29
;------------------------------------------------
INTF==0X0F	;INT FLAG REG
;================================================
	EXIF   EQU 2  ;EXTERNAL /INT FLAG
	ICIF   EQU 1  ;PORT6 INPUT CHANGE INT FLAG
	TCIF   EQU 0  ;TCC COUNT OVERFLOW INT FLAG
;-----------------------------------------------
;CONT REG,(OPTION REG),CONT WRITE IT
;===============================================
	INTEF  EQU 6  ;INT ENABLE FLAG
	TS     EQU 5  ;TMR0(TCC) CLOCK SOURCE SELECT
	TE     EQU 4  ;TCC COUNT EDGE,0-RISE EDGE,1-DOWN EDGE
	PAB    EQU 3  ;PRESCALER ASIGN BIT,0-TCC,1-WDT
	PSR2   EQU 2  ;PRESCALER b2:0-/2,1-/4,2-/8,3-/16,4-/32,5-/64,6-/128,7-/256(TCC)
	PSR1   EQU 1  ;PRESCALER b1:0-/1,1-/2,2-/4,3-/8, 4-/16,5-/32,6-/64, 7-/128(WDT)
	PSR0   EQU 0  ;PRESCALER b0
IOC5 	  EQU 5
IOC6 	  EQU 6
IOCA	   EQU 10  ;PRESCALER COUNTER REG,READONLY
IOCB	   EQU 0x0B;Enable P62-P60,P52-P50 PullDown:0-Enable,1-Disable
IOCC 	  EQU 0x0C;D7-D4,D2-D0 P6 OC OutPut,0:Enable OC
IOCD 	  EQU 0x0D;P67-P60(Ecept P63) Pull Up 0-Enable
IOCE 	  EQU 0x0E;WDTCON
WDTCON	 EQU 0X0E
	WDTE   EQU 7  ;WDT ENABLE
	EIS    EQU 6  ;1-PORT6.0 AS /INT PIN,0-PORT60 AS GENERAL PIN
;------------------------------------------------
INTC       EQU 0X0F;IOCF0,INT MASK REG(INT CONTROL REG)
;================================================
	EXIE   EQU 2  ;EXT  INT ENABLE
	ICIE   EQU 1  ;PORT6 INPUT CHANGE ENABLE
	TCIE   EQU 0  ;TCC COUNT OVERFLOW INT ENABLE	
	
Image_a		equ	0x2e	;
Image_status	equ	0x2f	;
Save_Environment_Mac	macro
;	{
	mov	Image_a,a	
	swap	Image_a		   
	swapa	status		    
	mov	Image_Status,a     
	endm	 	
;	}
Restore_Environment_Mac	macro
;	{
	swapa	Image_Status	  
	mov	status,a
	swapa	image_a
	reti
	endm
;	}
;------------------------------
Clr153ram Macro     
        MOV     A,@0X10
        MOV     rsr,A
ClrLoop:
		wdtc
		clr	tcc
        CLR     iar
        INC     Rsr
        JBC     Rsr,5
        JBS     Rsr,4
        JMP     ClrLoop
        ENDM