newcpu.c

又一个游戏模拟器,著名ARC模拟器源码,包括多个平台

/*
 * UAE - The Un*x Amiga Emulator
 *
 * MC68000 emulation
 *
 * (c) 1995 Bernd Schmidt
 */

#include "raine.h"
#include "newmem.h"
#include "readcpu.h"
#include "newcpu.h"

/* Opcode of faulting instruction */
UINT16 last_op_for_exception_3;
/* PC at fault time */
CPTR last_addr_for_exception_3;
/* Address that generated the exception */
CPTR last_fault_for_exception_3;

int areg_byteinc[] = { 1,1,1,1,1,1,1,2 };
int imm8_table[] = { 8,1,2,3,4,5,6,7 };

int movem_index1[256];
int movem_index2[256];
int movem_next[256];

cpuop_func *cpufunctbl[65536];

int cycles;

static unsigned long op_illg_1 (UINT32 opcode)
{
    op_illg (opcode);
    return 4;
}

static void build_cpufunctbl (void)
{
    int i;
    unsigned long opcode;
    struct cputbl *tbl = op_smalltbl_1;
	
    for (opcode = 0; opcode < 65536; opcode++)
		cpufunctbl[opcode] = op_illg_1;
    for (i = 0; tbl[i].handler != NULL; i++) {
		if (! tbl[i].specific)
			cpufunctbl[tbl[i].opcode] = tbl[i].handler;
    }
    for (opcode = 0; opcode < 65536; opcode++) {
		cpuop_func *f;
		
		if (table68k[opcode].mnemo == i_ILLG || table68k[opcode].clev > 2)
			continue;
		
		if (table68k[opcode].handler != -1) {
			f = cpufunctbl[table68k[opcode].handler];
			if (f == op_illg_1)
				abort();
			cpufunctbl[opcode] = f;
		}
    }
    for (i = 0; tbl[i].handler != NULL; i++) {
		if (tbl[i].specific)
			cpufunctbl[tbl[i].opcode] = tbl[i].handler;
    }
}

int MC68020 = 0;

void init_m68k (void)
{
    int i;
	
    MC68020 = 1;
    for (i = 0 ; i < 256 ; i++) {
		int j;
		for (j = 0 ; j < 8 ; j++) {
			if (i & (1 << j)) break;
		}
		movem_index1[i] = j;
		movem_index2[i] = 7-j;
		movem_next[i] = i & (~(1 << j));
    }
	
    read_table68k ();
    do_merges ();
	
    build_cpufunctbl ();
}

void m68k_cleanup (void)
{
    free (table68k);
}

struct regstruct regs, lastint_regs;
static struct regstruct regs_backup[16];
static int backup_pointer = 0;
static long int m68kpc_offset;
int lastint_no;

INT32 ShowEA (int reg, amodes mode, wordsizes size, char *buf, output_func_ptr debug_out )
{
    UINT16 dp;
    INT8 disp8;
    INT16 disp16;
    int r;
    UINT32 dispreg;
    CPTR addr;
    INT32 offset = 0;
    char buffer[80];
	
    switch (mode){
	case Dreg:
		sprintf (buffer,"D%d", reg);
		break;
	case Areg:
		sprintf (buffer,"A%d", reg);
		break;
	case Aind:
		sprintf (buffer,"(A%d)", reg);
		break;
	case Aipi:
		sprintf (buffer,"(A%d)+", reg);
		break;
	case Apdi:
		sprintf (buffer,"-(A%d)", reg);
		break;
	case Ad16:
		disp16 = get_iword_1 (m68kpc_offset); m68kpc_offset += 2;
		addr = m68k_areg(regs,reg) + (INT16)disp16;
		sprintf (buffer,"(A%d,$%04x) == $%08lx", reg, disp16 & 0xffff,
			(unsigned long)addr);
		break;
	case Ad8r:
		dp = get_iword_1 (m68kpc_offset); m68kpc_offset += 2;
		disp8 = dp & 0xFF;
		r = (dp & 0x7000) >> 12;
		dispreg = dp & 0x8000 ? m68k_areg(regs,r) : m68k_dreg(regs,r);
		if (!(dp & 0x800)) dispreg = (INT32)(INT16)(dispreg);
		dispreg <<= (dp >> 9) & 3;
		
		if (dp & 0x100) {
			INT32 outer = 0, disp = 0;
			INT32 base = m68k_areg(regs,reg);
			char name[10];
			sprintf (name,"A%d, ",reg);
			if (dp & 0x80) { base = 0; name[0] = 0; }
			if (dp & 0x40) dispreg = 0;
			if ((dp & 0x30) == 0x20) { disp = (INT32)(INT16)get_iword_1 (m68kpc_offset); m68kpc_offset += 2; }
			if ((dp & 0x30) == 0x30) { disp = get_ilong_1 (m68kpc_offset); m68kpc_offset += 4; }
			base += disp;
			
			if ((dp & 0x3) == 0x2) { outer = (INT32)(INT16)get_iword_1 (m68kpc_offset); m68kpc_offset += 2; }
			if ((dp & 0x3) == 0x3) { outer = get_ilong_1 (m68kpc_offset); m68kpc_offset += 4; }
			
			if (!(dp & 4)) base += dispreg;
			if (dp & 3) base = cpu_readmem24_dword(base);
			if (dp & 4) base += dispreg;
			
			addr = base + outer;
			sprintf (buffer,"(%s%c%d.%c*%d+%ld)+%ld == $%08lx", name,
				dp & 0x8000 ? 'A' : 'D', (int)r, dp & 0x800 ? 'L' : 'W',
				1 << ((dp >> 9) & 3),
				disp,outer,
				(unsigned long)addr);
		} else {
			addr = m68k_areg(regs,reg) + (INT32)((INT8)disp8) + dispreg;
			sprintf (buffer,"(A%d, %c%d.%c*%d, $%02x) == $%08lx", reg,
				dp & 0x8000 ? 'A' : 'D', (int)r, dp & 0x800 ? 'L' : 'W',
				1 << ((dp >> 9) & 3), disp8,
				(unsigned long)addr);
		}
		break;
	case PC16:
		addr = m68k_getpc () + m68kpc_offset;
		disp16 = get_iword_1 (m68kpc_offset); m68kpc_offset += 2;
		addr += (INT16)disp16;
		sprintf (buffer,"(PC,$%04x) == $%08lx", disp16 & 0xffff,(unsigned long)addr);
		break;
	case PC8r:
		addr = m68k_getpc () + m68kpc_offset;
		dp = get_iword_1 (m68kpc_offset); m68kpc_offset += 2;
		disp8 = dp & 0xFF;
		r = (dp & 0x7000) >> 12;
		dispreg = dp & 0x8000 ? m68k_areg(regs,r) : m68k_dreg(regs,r);
		if (!(dp & 0x800)) dispreg = (INT32)(INT16)(dispreg);
		dispreg <<= (dp >> 9) & 3;
		
		if (dp & 0x100) {
			INT32 outer = 0,disp = 0;
			INT32 base = addr;
			char name[10];
			sprintf (name,"PC, ");
			if (dp & 0x80) { base = 0; name[0] = 0; }
			if (dp & 0x40) dispreg = 0;
			if ((dp & 0x30) == 0x20) { disp = (INT32)(INT16)get_iword_1 (m68kpc_offset); m68kpc_offset += 2; }
			if ((dp & 0x30) == 0x30) { disp = get_ilong_1 (m68kpc_offset); m68kpc_offset += 4; }
			base += disp;
			
			if ((dp & 0x3) == 0x2) { outer = (INT32)(INT16)get_iword_1 (m68kpc_offset); m68kpc_offset += 2; }
			if ((dp & 0x3) == 0x3) { outer = get_ilong_1 (m68kpc_offset); m68kpc_offset += 4; }
			
			if (!(dp & 4)) base += dispreg;
			if (dp & 3) base = cpu_readmem24_dword (base);
			if (dp & 4) base += dispreg;
			
			addr = base + outer;
			sprintf (buffer,"(%s%c%d.%c*%d+%ld)+%ld == $%08lx", name,
				dp & 0x8000 ? 'A' : 'D', (int)r, dp & 0x800 ? 'L' : 'W',
				1 << ((dp >> 9) & 3),
				disp,outer,
				(unsigned long)addr);
		} else {
			addr += (INT32)((INT8)disp8) + dispreg;
			sprintf (buffer,"(PC, %c%d.%c*%d, $%02x) == $%08lx", dp & 0x8000 ? 'A' : 'D',
				(int)r, dp & 0x800 ? 'L' : 'W',  1 << ((dp >> 9) & 3),
				disp8, (unsigned long)addr);
		}
		break;
	case absw:
		sprintf (buffer,"$%08lx", (unsigned long)(INT32)(INT16)get_iword_1 (m68kpc_offset));
		m68kpc_offset += 2;
		break;
	case absl:
		sprintf (buffer,"$%08lx", (unsigned long)get_ilong_1 (m68kpc_offset));
		m68kpc_offset += 4;
		break;
	case imm:
		switch (size){
		case sz_byte:
			sprintf (buffer,"#$%02x", (unsigned int)(get_iword_1 (m68kpc_offset) & 0xff));
			m68kpc_offset += 2;
			break;
		case sz_word:
			sprintf (buffer,"#$%04x", (unsigned int)(get_iword_1 (m68kpc_offset) & 0xffff));
			m68kpc_offset += 2;
			break;
		case sz_long:
			sprintf (buffer,"#$%08lx", (unsigned long)(get_ilong_1 (m68kpc_offset)));
			m68kpc_offset += 4;
			break;
		default:
			break;
		}
		break;
		case imm0:
			offset = (INT32)(INT8)get_iword_1 (m68kpc_offset);
			m68kpc_offset += 2;
			sprintf (buffer,"#$%02x", (unsigned int)(offset & 0xff));
			break;
		case imm1:
			offset = (INT32)(INT16)get_iword_1 (m68kpc_offset);
			m68kpc_offset += 2;
			sprintf (buffer,"#$%04x", (unsigned int)(offset & 0xffff));
			break;
		case imm2:
			offset = (INT32)get_ilong_1 (m68kpc_offset);
			m68kpc_offset += 4;
			sprintf (buffer,"#$%08lx", (unsigned long)offset);
			break;
		case immi:
			offset = (INT32)(INT8)(reg & 0xff);
			sprintf (buffer,"#$%08lx", (unsigned long)offset);
			break;
		default:
			break;
    }
    if (buf == 0)
		(*debug_out) ("%s", buffer);
    else
		strcat (buf, buffer);
    return offset;
}


UINT32 get_disp_ea_020 (UINT32 base, UINT32 dp)
{
    int reg = (dp >> 12) & 15;
    INT32 regd = regs.regs[reg];
    if ((dp & 0x800) == 0)
		regd = (INT32)(INT16)regd;
    regd <<= (dp >> 9) & 3;
    if (dp & 0x100) {
		INT32 outer = 0;
		if (dp & 0x80) base = 0;
		if (dp & 0x40) regd = 0;
		
		if ((dp & 0x30) == 0x20) base += (INT32)(INT16)next_iword();
		if ((dp & 0x30) == 0x30) base += next_ilong();
		
		if ((dp & 0x3) == 0x2) outer = (INT32)(INT16)next_iword();
		if ((dp & 0x3) == 0x3) outer = next_ilong();
		
		if ((dp & 0x4) == 0) base += regd;
		if (dp & 0x3) base = cpu_readmem24_dword (base);
		if (dp & 0x4) base += regd;
		
		return base + outer;
    } else {
		return base + (INT32)((INT8)dp) + regd;
    }
}

void MakeSR (void)
{
    regs.sr = ((regs.t1 << 15) | (regs.t0 << 14)
	       | (regs.s << 13) | (regs.m << 12) | (regs.intmask << 8)
		   | (GET_XFLG << 4) | (GET_NFLG << 3) | (GET_ZFLG << 2) | (GET_VFLG << 1)
		   | GET_CFLG);
}

void MakeFromSR (void)
{
    int oldm = regs.m;
    int olds = regs.s;
	
    regs.t1 = (regs.sr >> 15) & 1;
    regs.t0 = (regs.sr >> 14) & 1;
    regs.s = (regs.sr >> 13) & 1;
    regs.m = (regs.sr >> 12) & 1;
    regs.intmask = (regs.sr >> 8) & 7;
    SET_XFLG ((regs.sr >> 4) & 1);
    SET_NFLG ((regs.sr >> 3) & 1);
    SET_ZFLG ((regs.sr >> 2) & 1);
    SET_VFLG ((regs.sr >> 1) & 1);
    SET_CFLG (regs.sr & 1);
	if (olds != regs.s) {
		if (olds) {
			if (oldm)
				regs.msp = m68k_areg(regs, 7);
			else
				regs.isp = m68k_areg(regs, 7);
			m68k_areg(regs, 7) = regs.usp;
		} else {
			regs.usp = m68k_areg(regs, 7);
			m68k_areg(regs, 7) = regs.m ? regs.msp : regs.isp;
		}
	} else if (olds && oldm != regs.m) {
		if (oldm) {
			regs.msp = m68k_areg(regs, 7);
			m68k_areg(regs, 7) = regs.isp;
		} else {
			regs.isp = m68k_areg(regs, 7);
			m68k_areg(regs, 7) = regs.msp;
		}
	}
}

void Exception(int nr, CPTR oldpc)