mc9s12dp256.lst

Freescale HCS12DP256 CAN通讯程序源代码

  398:  volatile PPSSSTR _PPSS;                                    /* Port S Polarity Select Register */
  399:  volatile PPSTSTR _PPST;                                    /* Port T Polarity Select Register */
  400:  volatile PTHSTR _PTH;                                      /* Port H I/O Register */
  401:  volatile PTIHSTR _PTIH;                                    /* Port H Input Register */
  402:  volatile PTIJSTR _PTIJ;                                    /* Port J Input Register */
  403:  volatile PTIMSTR _PTIM;                                    /* Port M Input */
  404:  volatile PTIPSTR _PTIP;                                    /* Port P Input */
  405:  volatile PTISSTR _PTIS;                                    /* Port S Input */
  406:  volatile PTITSTR _PTIT;                                    /* Port T Input */
  407:  volatile PTJSTR _PTJ;                                      /* Port J I/O Register */
  408:  volatile PTMSTR _PTM;                                      /* Port M I/O Register */
  409:  volatile PTPSTR _PTP;                                      /* Port P I/O Register */
  410:  volatile PTSSTR _PTS;                                      /* Port S I/O Register */
  411:  volatile PTTSTR _PTT;                                      /* Port T I/O Register */
  412:  volatile PUCRSTR _PUCR;                                    /* Pull-Up Control Register */
  413:  volatile PWMCAESTR _PWMCAE;                                /* PWM Center Align Enable Register */
  414:  volatile PWMCLKSTR _PWMCLK;                                /* PWM Clock Select Register */
  415:  volatile PWMCTLSTR _PWMCTL;                                /* PWM Control Register */
  416:  volatile PWMESTR _PWME;                                    /* PWM Enable Register */
  417:  volatile PWMPOLSTR _PWMPOL;                                /* PWM Polarity Register */
  418:  volatile PWMPRCLKSTR _PWMPRCLK;                            /* PWM Prescale Clock Select Register */
  419:  volatile PWMSCLASTR _PWMSCLA;                              /* PWM Scale A Register */
  420:  volatile PWMSCLBSTR _PWMSCLB;                              /* PWM Scale B Register */
  421:  volatile PWMSDNSTR _PWMSDN;                                /* PWM Shutdown Register */
  422:  volatile RDRHSTR _RDRH;                                    /* Port H Reduced Drive Register */
  423:  volatile RDRIVSTR _RDRIV;                                  /* Reduced Drive of I/O Lines */
  424:  volatile RDRJSTR _RDRJ;                                    /* Port J Reduced Drive Register */
  425:  volatile RDRMSTR _RDRM;                                    /* Port M Reduced Drive Register */
  426:  volatile RDRPSTR _RDRP;                                    /* Port P Reduced Drive Register */
  427:  volatile RDRSSTR _RDRS;                                    /* Port S Reduced Drive Register */
  428:  volatile RDRTSTR _RDRT;                                    /* Port T Reduced Drive Register */
  429:  volatile REFDVSTR _REFDV;                                  /* CRG Reference Divider Register */
  430:  volatile RTICTLSTR _RTICTL;                                /* CRG RTI Control Register */
  431:  volatile SCI0CR1STR _SCI0CR1;                              /* SCI 0 Control Register 1 */
  432:  volatile SCI0CR2STR _SCI0CR2;                              /* SCI 0 Control Register 2 */
  433:  volatile SCI0DRHSTR _SCI0DRH;                              /* SCI 0 Data Register High */
  434:  volatile SCI0DRLSTR _SCI0DRL;                              /* SCI 0 Data Register Low */
  435:  volatile SCI0SR1STR _SCI0SR1;                              /* SCI 0 Status Register 1 */
  436:  volatile SCI0SR2STR _SCI0SR2;                              /* SCI 0 Status Register 2 */
  437:  volatile SCI1CR1STR _SCI1CR1;                              /* SCI 1 Control Register 1 */
  438:  volatile SCI1CR2STR _SCI1CR2;                              /* SCI 1 Control Register 2 */
  439:  volatile SCI1DRHSTR _SCI1DRH;                              /* SCI 1 Data Register High */
  440:  volatile SCI1DRLSTR _SCI1DRL;                              /* SCI 1 Data Register Low */
  441:  volatile SCI1SR1STR _SCI1SR1;                              /* SCI 1 Status Register 1 */
  442:  volatile SCI1SR2STR _SCI1SR2;                              /* SCI 1 Status Register 2 */
  443:  volatile SPI0BRSTR _SPI0BR;                                /* SPI 0 Baud Rate Register */
  444:  volatile SPI0CR1STR _SPI0CR1;                              /* SPI 0 Control Register */
  445:  volatile SPI0CR2STR _SPI0CR2;                              /* SPI 0 Control Register 2 */
  446:  volatile SPI0DRSTR _SPI0DR;                                /* SPI 0 Data Register */
  447:  volatile SPI0SRSTR _SPI0SR;                                /* SPI 0 Status Register */
  448:  volatile SPI1BRSTR _SPI1BR;                                /* SPI 1 Baud Rate Register */
  449:  volatile SPI1CR1STR _SPI1CR1;                              /* SPI 1 Control Register */
  450:  volatile SPI1CR2STR _SPI1CR2;                              /* SPI 1 Control Register 2 */
  451:  volatile SPI1DRSTR _SPI1DR;                                /* SPI 1 Data Register */
  452:  volatile SPI1SRSTR _SPI1SR;                                /* SPI 1 Status Register */
  453:  volatile SPI2BRSTR _SPI2BR;                                /* SPI 2 Baud Rate Register */
  454:  volatile SPI2CR1STR _SPI2CR1;                              /* SPI 2 Control Register */
  455:  volatile SPI2CR2STR _SPI2CR2;                              /* SPI 2 Control Register 2 */
  456:  volatile SPI2DRSTR _SPI2DR;                                /* SPI 2 Data Register */
  457:  volatile SPI2SRSTR _SPI2SR;                                /* SPI 2 Status Register */
  458:  volatile SYNRSTR _SYNR;                                    /* CRG Synthesizer Register */
  459:  volatile TCTL1STR _TCTL1;                                  /* Timer Control Registers 1 */
  460:  volatile TCTL2STR _TCTL2;                                  /* Timer Control Registers 2 */
  461:  volatile TCTL3STR _TCTL3;                                  /* Timer Control Register 3 */
  462:  volatile TCTL4STR _TCTL4;                                  /* Timer Control Register 4 */
  463:  volatile TFLG1STR _TFLG1;                                  /* Main Timer Interrupt Flag 1 */
  464:  volatile TFLG2STR _TFLG2;                                  /* Main Timer Interrupt Flag 2 */
  465:  volatile TIESTR _TIE;                                      /* Timer Interrupt Enable Register */
  466:  volatile TIOSSTR _TIOS;                                    /* Timer Input Capture/Output Compare Select */
  467:  volatile TSCR1STR _TSCR1;                                  /* Timer System Control Register1 */
  468:  volatile TSCR2STR _TSCR2;                                  /* Timer System Control Register 2 */
  469:  volatile TTOVSTR _TTOV;                                    /* Timer Toggle On Overflow Register */
  470:  volatile WOMMSTR _WOMM;                                    /* Port M Wired-Or Mode Register */
  471:  volatile WOMSSTR _WOMS;                                    /* Port S Wired-Or Mode Register */
  472:  volatile ATD0CTL23STR _ATD0CTL23;                          /* ATD 0 Control Register 23 */
  473:  volatile ATD0CTL45STR _ATD0CTL45;                          /* ATD 0 Control Register 45 */
  474:  volatile ATD0DR0STR _ATD0DR0;                              /* ATD 0 Conversion Result Register 0 */
  475:  volatile ATD0DR1STR _ATD0DR1;                              /* ATD 0 Conversion Result Register 1 */
  476:  volatile ATD0DR2STR _ATD0DR2;                              /* ATD 0 Conversion Result Register 2 */
  477:  volatile ATD0DR3STR _ATD0DR3;                              /* ATD 0 Conversion Result Register 3 */
  478:  volatile ATD0DR4STR _ATD0DR4;                              /* ATD 0 Conversion Result Register 4 */
  479:  volatile ATD0DR5STR _ATD0DR5;                              /* ATD 0 Conversion Result Register 5 */
  480:  volatile ATD0DR6STR _ATD0DR6;                              /* ATD 0 Conversion Result Register 6 */
  481:  volatile ATD0DR7STR _ATD0DR7;                              /* ATD 0 Conversion Result Register 7 */
  482:  volatile ATD1CTL23STR _ATD1CTL23;                          /* ATD 1 Control Register 23 */
  483:  volatile ATD1CTL45STR _ATD1CTL45;                          /* ATD 1 Control Register 45 */
  484:  volatile ATD1DR0STR _ATD1DR0;                              /* ATD 1 Conversion Result Register 0 */
  485:  volatile ATD1DR1STR _ATD1DR1;                              /* ATD 1 Conversion Result Register 1 */
  486:  volatile ATD1DR2STR _ATD1DR2;                              /* ATD 1 Conversion Result Register 2 */
  487:  volatile ATD1DR3STR _ATD1DR3;                              /* ATD 1 Conversion Result Register 3 */
  488:  volatile ATD1DR4STR _ATD1DR4;                              /* ATD 1 Conversion Result Register 4 */
  489:  volatile ATD1DR5STR _ATD1DR5;                              /* ATD 1 Conversion Result Register 5 */
  490:  volatile ATD1DR6STR _ATD1DR6;                              /* ATD 1 Conversion Result Register 6 */
  491:  volatile ATD1DR7STR _ATD1DR7;                              /* ATD 1 Conversion Result Register 7 */
  492:  volatile DDRABSTR _DDRAB;                                  /* Port AB Data Direction Register */
  493:  volatile MCCNTSTR _MCCNT;                                  /* Modulus Down-Counter Count Register */
  494:  volatile PA10HSTR _PA10H;                                  /* 8-Bit Pulse Accumulators Holding 10 Register */
  495:  volatile PA32HSTR _PA32H;                                  /* 8-Bit Pulse Accumulators Holding 32 Register */
  496:  volatile PACN10STR _PACN10;                                /* Pulse Accumulators Count 10 Register */
  497:  volatile PACN32STR _PACN32;                                /* Pulse Accumulators Count 32 Register */
  498:  volatile PORTABSTR _PORTAB;                                /* Port AB Register */
  499:  volatile PWMCNT01STR _PWMCNT01;                            /* PWM Channel Counter 01 Register */
  500:  volatile PWMCNT23STR _PWMCNT23;                            /* PWM Channel Counter 23 Register */
  501:  volatile PWMCNT45STR _PWMCNT45;                            /* PWM Channel Counter 45 Register */
  502:  volatile PWMCNT67STR _PWMCNT67;                            /* PWM Channel Counter 67 Register */
  503:  volatile PWMDTY01STR _PWMDTY01;                            /* PWM Channel Duty 01 Register */
  504:  volatile PWMDTY23STR _PWMDTY23;                            /* PWM Channel Duty 23 Register */
  505:  volatile PWMDTY45STR _PWMDTY45;                            /* PWM Channel Duty 45 Register */
  506:  volatile PWMDTY67STR _PWMDTY67;                            /* PWM Channel Duty 67 Register */
  507:  volatile PWMPER01STR _PWMPER01;                            /* PWM Channel Period 01 Register */
  508:  volatile PWMPER23STR _PWMPER23;                            /* PWM Channel Period 23 Register */
  509:  volatile PWMPER45STR _PWMPER45;                            /* PWM Channel Period 45 Register */
  510:  volatile PWMPER67STR _PWMPER67;                            /* PWM Channel Period 67 Register */
  511:  volatile SCI0BDSTR _SCI0BD;                                /* SCI 0 Baud Rate Register */
  512:  volatile SCI1BDSTR _SCI1BD;                                /* SCI 1 Baud Rate Register */
  513:  volatile TC0STR _TC0;                                      /* Timer Input Capture/Output Compare Register 0 */
  514:  volatile TC0HSTR _TC0H;                                    /* Timer Input Capture Holding Registers 0 */
  515:  volatile TC1STR _TC1;                                      /* Timer Input Capture/Output Compare Register 1 */
  516:  volatile TC1HSTR _TC1H;                                    /* Timer Input Capture Holding Registers 1 */
  517:  volatile TC2STR _TC2;                                      /* Timer Input Capture/Output Compare Register 2 */
  518:  volatile TC2HSTR _TC2H;                                    /* Timer Input Capture Holding Registers 2 */
  519:  volatile TC3STR _TC3;                                      /* Timer Input Capture/Output Compare Register 3 */
  520:  volatile TC3HSTR _TC3H;                                    /* Timer Input Capture Holding Registers 3 */
  521:  volatile TC4STR _TC4;                                      /* Timer Input Capture/Output Compare Register 4 */
  522:  volatile TC5STR _TC5;                                      /* Timer Input Capture/Output Compare Register 5 */
  523:  volatile TC6STR _TC6;                                      /* Timer Input Capture/Output Compare Register 6 */
  524:  volatile TC7STR _TC7;                                      /* Timer Input Capture/Output Compare Register 7 */
  525:  volatile TCNTSTR _TCNT;                                    /* Timer Count Register */
  526: