📄 spi_slave.s
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.module SPI_slave.c
.area text(rom, con, rel)
.dbfile F:\IccAvr_Pro\SPI_slave.c
.area vector(rom, abs)
.org 40
jmp _spi_stc_isr
.area text(rom, con, rel)
.dbfunc e spi_stc_isr _spi_stc_isr fV
.even
_spi_stc_isr::
st -y,R2
st -y,R3
st -y,R16
st -y,R17
st -y,R24
st -y,R25
st -y,R30
st -y,R31
in R2,0x3f
st -y,R2
.dbline -1
.dbline 15
;
; #include "SPI_slave.h"
; #include "qep.h"
; unsigned char SPI_rx_buf[SPI_size];
; unsigned char SPI_tx_buf[SPI_size];
; unsigned char rx_index;
; unsigned char tx_index,SPI_tx_flag,SPI_rx_flag;
; unsigned char temp;
; extern int qep_cnt[QEP_size];
; extern unsigned char pwm_value[2];
; extern unsigned char pwm_flag;
;
; #pragma interrupt_handler spi_stc_isr:11
; void spi_stc_isr(void)
; {
.dbline 17
;
; if(SPI_tx_flag)
lds R2,_SPI_tx_flag
tst R2
breq L2
.dbline 18
; {
.dbline 19
; SPDR=SPI_tx_buf[tx_index++];
lds R2,_tx_index
clr R3
mov R24,R2
subi R24,255 ; addi 1
sts _tx_index,R24
ldi R24,<_SPI_tx_buf
ldi R25,>_SPI_tx_buf
mov R30,R2
clr R31
add R30,R24
adc R31,R25
ldd R2,z+0
out 0xf,R2
.dbline 20
; }
xjmp L3
L2:
.dbline 21
; else SPDR=0xee;
ldi R24,238
out 0xf,R24
L3:
.dbline 23
;
; temp=SPDR;
in R2,0xf
sts _temp,R2
.dbline 24
; if(temp==0xaa||temp==0x55)
mov R24,R2
cpi R24,170
breq L6
cpi R24,85
brne L4
L6:
.dbline 25
; SPI_rx_flag=1;
ldi R24,1
sts _SPI_rx_flag,R24
L4:
.dbline 27
;
; if(tx_index>=SPI_size)
lds R24,_tx_index
cpi R24,3
brlo L7
.dbline 28
; {
.dbline 29
; tx_index=0;
clr R2
sts _tx_index,R2
.dbline 30
; SPI_tx_flag=0;
sts _SPI_tx_flag,R2
.dbline 31
; }
L7:
.dbline 32
; if(SPI_rx_flag)
lds R2,_SPI_rx_flag
tst R2
brne X3
xjmp L9
X3:
.dbline 33
; {
.dbline 34
; SPI_rx_buf[rx_index]=temp;
ldi R24,<_SPI_rx_buf
ldi R25,>_SPI_rx_buf
lds R30,_rx_index
clr R31
add R30,R24
adc R31,R25
lds R2,_temp
std z+0,R2
.dbline 35
; if (rx_index<SPI_size) rx_index++;
lds R24,_rx_index
cpi R24,3
brsh L11
.dbline 35
subi R24,255 ; addi 1
sts _rx_index,R24
xjmp L12
L11:
.dbline 37
; else
; {
.dbline 38
; rx_index=0;
clr R2
sts _rx_index,R2
.dbline 39
; SPI_rx_flag=0;
sts _SPI_rx_flag,R2
.dbline 40
; switch(SPI_rx_buf[0])
lds R16,_SPI_rx_buf
clr R17
cpi R16,85
ldi R30,0
cpc R17,R30
brne X4
xjmp L33
X4:
cpi R16,85
ldi R30,0
cpc R17,R30
brge X5
xjmp L14
X5:
L37:
cpi R16,170
ldi R30,0
cpc R17,R30
breq L16
xjmp L14
X0:
.dbline 41
; {
L16:
.dbline 43
; case 0xaa:
; switch(SPI_rx_buf[1])
lds R16,_SPI_rx_buf+1
clr R17
cpi R16,0
cpc R16,R17
breq L21
X1:
cpi R16,1
ldi R30,0
cpc R17,R30
breq L23
cpi R16,2
ldi R30,0
cpc R17,R30
breq L27
xjmp L14
X2:
.dbline 44
; {
L21:
.dbline 46
; case 0x00:
; qep_cnt[0]=0;
clr R2
clr R3
sts _qep_cnt+1,R3
sts _qep_cnt,R2
.dbline 47
; qep_cnt[1]=0;
sts _qep_cnt+2+1,R3
sts _qep_cnt+2,R2
.dbline 48
; break;
xjmp L14
L23:
.dbline 50
; case 0x01:
; SPI_tx_buf[0]=0x55;
ldi R24,85
sts _SPI_tx_buf,R24
.dbline 51
; SPI_tx_buf[1]=(*(unsigned char*)(qep_cnt));
ldi R30,<_qep_cnt
ldi R31,>_qep_cnt
ldd R2,z+0
sts _SPI_tx_buf+1,R2
.dbline 52
; SPI_tx_buf[2]=(*((unsigned char*)(qep_cnt)+1));
lds R2,_qep_cnt+1
sts _SPI_tx_buf+2,R2
.dbline 53
; SPI_tx_flag=1;
ldi R24,1
sts _SPI_tx_flag,R24
.dbline 54
; break;
xjmp L14
L27:
.dbline 56
; case 0x02:
; SPI_tx_buf[0]=0x56;
ldi R24,86
sts _SPI_tx_buf,R24
.dbline 57
; SPI_tx_buf[1]=(*(unsigned char*)(qep_cnt+1));
ldi R30,<_qep_cnt+2
ldi R31,>_qep_cnt+2
ldd R2,z+0
sts _SPI_tx_buf+1,R2
.dbline 58
; SPI_tx_buf[2]=(*((unsigned char*)(qep_cnt+1)+1));
lds R2,_qep_cnt+2+1
sts _SPI_tx_buf+2,R2
.dbline 59
; SPI_tx_flag=1;
ldi R24,1
sts _SPI_tx_flag,R24
.dbline 60
; break;
.dbline 62
; default:
; break;
.dbline 64
; }
; break;
xjmp L14
L33:
.dbline 66
; case 0x55:
; pwm_value[0]=SPI_rx_buf[1];
lds R2,_SPI_rx_buf+1
sts _pwm_value,R2
.dbline 67
; pwm_value[1]=SPI_rx_buf[2];
lds R2,_SPI_rx_buf+2
sts _pwm_value+1,R2
.dbline 68
; pwm_flag=1;
ldi R24,1
sts _pwm_flag,R24
.dbline 69
; break;
.dbline 71
; default:
; break;
L14:
.dbline 73
; }
; }
L12:
.dbline 74
L9:
.dbline -2
L1:
ld R2,y+
out 0x3f,R2
ld R31,y+
ld R30,y+
ld R25,y+
ld R24,y+
ld R17,y+
ld R16,y+
ld R3,y+
ld R2,y+
.dbline 0 ; func end
reti
.dbend
.dbfunc e spi_init _spi_init fV
; temp -> R16
.even
_spi_init::
.dbline -1
.dbline 80
; }
; }
;
;
; //从机模式
; void spi_init(void)
; {
.dbline 83
; unsigned char temp;
; //MISO=ouput and MOSI,SCK,SS = input
; DDRB |=BIT(MISO);
sbi 0x17,6
.dbline 84
; PORTB |=BIT(MISO); //MISO上拉电阻有效
sbi 0x18,6
.dbline 85
; DDRB&=~BIT(SS);
cbi 0x17,4
.dbline 86
; SPCR = 0xC7; //SPI允许,从机模式,MSB,允许SPI中断 极性方式01,1/4系统时钟速率
ldi R24,199
out 0xd,R24
.dbline 87
; SPSR = 0x00;
clr R2
out 0xe,R2
.dbline 88
; temp = SPSR;
in R16,0xe
.dbline 89
; temp = SPDR; //清空SPI,和中断标志,使SPI空闲
in R16,0xf
.dbline 90
; SPI_tx_flag=0;
sts _SPI_tx_flag,R2
.dbline 91
; SPI_rx_flag=0;
sts _SPI_rx_flag,R2
.dbline 92
; rx_index=0;
sts _rx_index,R2
.dbline 93
; tx_index=0;
sts _tx_index,R2
.dbline -2
L38:
.dbline 0 ; func end
ret
.dbsym r temp 16 c
.dbend
.area bss(ram, con, rel)
_temp::
.blkb 1
.dbsym e temp _temp c
_SPI_rx_flag::
.blkb 1
.dbsym e SPI_rx_flag _SPI_rx_flag c
_SPI_tx_flag::
.blkb 1
.dbsym e SPI_tx_flag _SPI_tx_flag c
_tx_index::
.blkb 1
.dbsym e tx_index _tx_index c
_rx_index::
.blkb 1
.dbsym e rx_index _rx_index c
_SPI_tx_buf::
.blkb 3
.dbsym e SPI_tx_buf _SPI_tx_buf A[3:3]c
_SPI_rx_buf::
.blkb 3
.dbsym e SPI_rx_buf _SPI_rx_buf A[3:3]c
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