📄 motor_salve.lst

📁 用ICC编写的程序包括SPI
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    00E4 90200064  LDS	R2,pwm_value
    00E6 BC2A      OUT	0x2A,R2
(0037)    
(0038)    if(pwm_value[1]<3)
    00E7 91800065  LDS	R24,pwm_value+1
    00E9 3083      CPI	R24,3
    00EA F418      BCC	0x00EE
(0039)       pwm_value[1]=3;
    00EB E083      LDI	R24,3
    00EC 93800065  STS	pwm_value+1,R24
(0040)    if(pwm_value[1]>253)
    00EE EF8D      LDI	R24,0xFD
    00EF 90200065  LDS	R2,pwm_value+1
    00F1 1582      CP	R24,R2
    00F2 F410      BCC	0x00F5
(0041)       pwm_value[1]=253;
    00F3 93800065  STS	pwm_value+1,R24
(0042)    OCR1BH=0x00;
    00F5 2422      CLR	R2
    00F6 BC29      OUT	0x29,R2
(0043)    OCR1BL=pwm_value[1];
    00F7 90200065  LDS	R2,pwm_value+1
    00F9 BC28      OUT	0x28,R2
    00FA 9508      RET
_spi_stc_isr:
    00FB 922A      ST	R2,-Y
    00FC 923A      ST	R3,-Y
    00FD 930A      ST	R16,-Y
    00FE 931A      ST	R17,-Y
    00FF 938A      ST	R24,-Y
    0100 939A      ST	R25,-Y
    0101 93EA      ST	R30,-Y
    0102 93FA      ST	R31,-Y
    0103 B62F      IN	R2,0x3F
    0104 922A      ST	R2,-Y
FILE: F:\IccAvr_Pro\SPI_slave.c
(0001) 
(0002) #include "SPI_slave.h"
(0003) #include "qep.h"
(0004) unsigned char SPI_rx_buf[SPI_size];  
(0005) unsigned char SPI_tx_buf[SPI_size];  
(0006) unsigned char rx_index;  
(0007) unsigned char tx_index,SPI_tx_flag,SPI_rx_flag;
(0008) unsigned char temp;
(0009) extern int	qep_cnt[QEP_size];
(0010) extern unsigned char pwm_value[2];
(0011) extern unsigned char pwm_flag;
(0012) 
(0013) #pragma interrupt_handler spi_stc_isr:11
(0014) void spi_stc_isr(void)
(0015) {
(0016)  
(0017)   if(SPI_tx_flag)
    0105 90200069  LDS	R2,SPI_tx_flag
    0107 2022      TST	R2
    0108 F081      BEQ	0x0119
(0018)    {
(0019)    SPDR=SPI_tx_buf[tx_index++];
    0109 9020006A  LDS	R2,tx_index
    010B 2433      CLR	R3
    010C 2D82      MOV	R24,R2
    010D 5F8F      SUBI	R24,0xFF
    010E 9380006A  STS	tx_index,R24
    0110 E68C      LDI	R24,0x6C
    0111 E090      LDI	R25,0
    0112 2DE2      MOV	R30,R2
    0113 27FF      CLR	R31
    0114 0FE8      ADD	R30,R24
    0115 1FF9      ADC	R31,R25
    0116 8020      LDD	R2,Z+0
    0117 B82F      OUT	0x0F,R2
(0020)    }
    0118 C002      RJMP	0x011B
(0021)   else SPDR=0xee;
    0119 EE8E      LDI	R24,0xEE
    011A B98F      OUT	0x0F,R24
(0022)   
(0023)   temp=SPDR;
    011B B02F      IN	R2,0x0F
    011C 92200067  STS	temp,R2
(0024)   if(temp==0xaa||temp==0x55)
    011E 2D82      MOV	R24,R2
    011F 3A8A      CPI	R24,0xAA
    0120 F011      BEQ	0x0123
    0121 3585      CPI	R24,0x55
    0122 F419      BNE	0x0126
(0025)   	SPI_rx_flag=1;
    0123 E081      LDI	R24,1
    0124 93800068  STS	SPI_rx_flag,R24
(0026)   
(0027)   if(tx_index>=SPI_size)  
    0126 9180006A  LDS	R24,tx_index
    0128 3083      CPI	R24,3
    0129 F028      BCS	0x012F
(0028)   {
(0029)    tx_index=0; 
    012A 2422      CLR	R2
    012B 9220006A  STS	tx_index,R2
(0030)    SPI_tx_flag=0;
    012D 92200069  STS	SPI_tx_flag,R2
(0031)   }
(0032)   if(SPI_rx_flag)
    012F 90200068  LDS	R2,SPI_rx_flag
    0131 2022      TST	R2
    0132 F409      BNE	0x0134
    0133 C06E      RJMP	0x01A2
(0033)   {
(0034)   SPI_rx_buf[rx_index]=temp;
    0134 E68F      LDI	R24,0x6F
    0135 E090      LDI	R25,0
    0136 91E0006B  LDS	R30,rx_index
    0138 27FF      CLR	R31
    0139 0FE8      ADD	R30,R24
    013A 1FF9      ADC	R31,R25
    013B 90200067  LDS	R2,temp
    013D 8220      STD	Z+0,R2
(0035)     if (rx_index<SPI_size) rx_index++;
    013E 9180006B  LDS	R24,rx_index
    0140 3083      CPI	R24,3
    0141 F420      BCC	0x0146
    0142 5F8F      SUBI	R24,0xFF
    0143 9380006B  STS	rx_index,R24
    0145 C05C      RJMP	0x01A2
(0036)     else 
(0037)     {
(0038)      rx_index=0;
    0146 2422      CLR	R2
    0147 9220006B  STS	rx_index,R2
(0039) 	 SPI_rx_flag=0;
    0149 92200068  STS	SPI_rx_flag,R2
(0040) 	 switch(SPI_rx_buf[0])
    014B 9100006F  LDS	R16,SPI_rx_buf
    014D 2711      CLR	R17
    014E 3505      CPI	R16,0x55
    014F E0E0      LDI	R30,0
    0150 071E      CPC	R17,R30
    0151 F409      BNE	0x0153
    0152 C044      RJMP	0x0197
    0153 3505      CPI	R16,0x55
    0154 E0E0      LDI	R30,0
    0155 071E      CPC	R17,R30
    0156 F40C      BGE	0x0158
    0157 C04A      RJMP	0x01A2
    0158 3A0A      CPI	R16,0xAA
    0159 E0E0      LDI	R30,0
    015A 071E      CPC	R17,R30
    015B F009      BEQ	0x015D
    015C C045      RJMP	0x01A2
(0041) 	 {
(0042) 	   case 0xaa:
(0043) 			switch(SPI_rx_buf[1])
    015D 91000070  LDS	R16,SPI_rx_buf+1
    015F 2711      CLR	R17
    0160 3000      CPI	R16,0
    0161 0701      CPC	R16,R17
    0162 F049      BEQ	0x016C
    0163 3001      CPI	R16,1
    0164 E0E0      LDI	R30,0
    0165 071E      CPC	R17,R30
    0166 F081      BEQ	0x0177
    0167 3002      CPI	R16,2
    0168 E0E0      LDI	R30,0
    0169 071E      CPC	R17,R30
    016A F0E1      BEQ	0x0187
    016B C036      RJMP	0x01A2
(0044) 			{
(0045) 			case 0x00:
(0046) 			  qep_cnt[0]=0;
    016C 2422      CLR	R2
    016D 2433      CLR	R3
    016E 92300061  STS	qep_cnt+1,R3
    0170 92200060  STS	qep_cnt,R2
(0047) 			  qep_cnt[1]=0;
    0172 92300063  STS	qep_cnt+3,R3
    0174 92200062  STS	qep_cnt+2,R2
(0048) 			  break;
    0176 C02B      RJMP	0x01A2
(0049) 			case 0x01:
(0050) 			  SPI_tx_buf[0]=0x55;
    0177 E585      LDI	R24,0x55
    0178 9380006C  STS	SPI_tx_buf,R24
(0051) 			  SPI_tx_buf[1]=(*(unsigned char*)(qep_cnt));
    017A E6E0      LDI	R30,0x60
    017B E0F0      LDI	R31,0
    017C 8020      LDD	R2,Z+0
    017D 9220006D  STS	SPI_tx_buf+1,R2
(0052) 			  SPI_tx_buf[2]=(*((unsigned char*)(qep_cnt)+1));
    017F 90200061  LDS	R2,qep_cnt+1
    0181 9220006E  STS	SPI_tx_buf+2,R2
(0053) 			  SPI_tx_flag=1;
    0183 E081      LDI	R24,1
    0184 93800069  STS	SPI_tx_flag,R24
(0054) 			  break;
    0186 C01B      RJMP	0x01A2
(0055) 			case 0x02:
(0056) 			  SPI_tx_buf[0]=0x56;
    0187 E586      LDI	R24,0x56
    0188 9380006C  STS	SPI_tx_buf,R24
(0057) 			  SPI_tx_buf[1]=(*(unsigned char*)(qep_cnt+1));
    018A E6E2      LDI	R30,0x62
    018B E0F0      LDI	R31,0
    018C 8020      LDD	R2,Z+0
    018D 9220006D  STS	SPI_tx_buf+1,R2
(0058) 			  SPI_tx_buf[2]=(*((unsigned char*)(qep_cnt+1)+1));
    018F 90200063  LDS	R2,qep_cnt+3
    0191 9220006E  STS	SPI_tx_buf+2,R2
(0059) 			  SPI_tx_flag=1;
    0193 E081      LDI	R24,1
    0194 93800069  STS	SPI_tx_flag,R24
(0060) 			  break;
(0061) 			default:
(0062) 			  break;
(0063) 			}
(0064) 			break;
    0196 C00B      RJMP	0x01A2
(0065) 	   case 0x55:
(0066) 	   		pwm_value[0]=SPI_rx_buf[1];
    0197 90200070  LDS	R2,SPI_rx_buf+1
    0199 92200064  STS	pwm_value,R2
(0067) 			pwm_value[1]=SPI_rx_buf[2];
    019B 90200071  LDS	R2,SPI_rx_buf+2
    019D 92200065  STS	pwm_value+1,R2
(0068) 			pwm_flag=1;
    019F E081      LDI	R24,1
    01A0 93800066  STS	pwm_flag,R24
(0069) 			break;	
(0070) 	   default:
(0071) 	        break;
(0072) 		}
(0073)    }
(0074)   }
    01A2 9029      LD	R2,Y+
    01A3 BE2F      OUT	0x3F,R2
    01A4 91F9      LD	R31,Y+
    01A5 91E9      LD	R30,Y+
    01A6 9199      LD	R25,Y+
    01A7 9189      LD	R24,Y+
    01A8 9119      LD	R17,Y+
    01A9 9109      LD	R16,Y+
    01AA 9039      LD	R3,Y+
    01AB 9029      LD	R2,Y+
    01AC 9518      RETI
(0075) }  
(0076) 	
(0077) 
(0078) //从机模式
(0079) void spi_init(void)  
(0080) {  
(0081)   unsigned char temp;  
(0082)   		   		    //MISO=ouput and MOSI,SCK,SS = input  
(0083)   DDRB |=BIT(MISO);
_spi_init:
  temp                 --> R16
    01AD 9ABE      SBI	0x17,6
(0084)   PORTB |=BIT(MISO);    //MISO上拉电阻有效   
    01AE 9AC6      SBI	0x18,6
(0085)   DDRB&=~BIT(SS);
    01AF 98BC      CBI	0x17,4
(0086)   SPCR = 0xC7;    //SPI允许，从机模式，MSB，允许SPI中断  极性方式01，1/4系统时钟速率  
    01B0 EC87      LDI	R24,0xC7
    01B1 B98D      OUT	0x0D,R24
(0087)   SPSR = 0x00;  
    01B2 2422      CLR	R2
    01B3 B82E      OUT	0x0E,R2
(0088)   temp = SPSR;  
    01B4 B10E      IN	R16,0x0E
(0089)   temp = SPDR;    //清空SPI，和中断标志，使SPI空闲
    01B5 B10F      IN	R16,0x0F
(0090)   SPI_tx_flag=0;
    01B6 92200069  STS	SPI_tx_flag,R2
(0091)   SPI_rx_flag=0; 
    01B8 92200068  STS	SPI_rx_flag,R2
(0092)   rx_index=0;
    01BA 9220006B  STS	rx_index,R2
(0093)   tx_index=0; 
FILE: <library>
    01BC 9220006A  STS	tx_index,R2
    01BE 9508      RET
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