860uartcode.txt

powerpc系列的一款芯片mpc860的uart驱动的源代码

Title:  ul.c
Transmit and receive data, UART mode, SCC1, loopback

Feb. 1, 1996

The results of this routine are:
1. Initializes for handling SCC1 interrupts.
2. Transmits four lines of a poem, one line at a time, from one
   transmit buffer, loopback mode.
3. Receives the four lines in four receive buffers.
4. Transmit buffer sent and receive buffer closed are handle using
   interrupts.
Assumptions:
1. IMMR has been previously initialized.
2. Except for 1, reset conditions exist.

If the program executes properly, the LED counter is equal to four
and the poem is in the following buffer locations:
IMMBASE+2240
IMMBASE+2280
IMMBASE+22C0
IMMBASE+2300

/* Equipment : 860ADS Evaluation Board                       */
/* (UL.C)                                                    */

void *const stdout = 0;       /* STANDARD OUTPUT DEVICE      */
#include <string.h>           /* STRING FUNCTIONS            */
#define uart1                 /* SCC1 IS TO BE UART          */
#include "MPC860.h"           /* INTNL MEM MAP EQUATES       */
struct immbase *pimm;         /* POINTER TO INTNL MEM MAP    */
struct  descs {
   rxbdu recvbd0;             /* RECEIVE BUFFER 0            */
   rxbdu recvbd1;             /* RECEIVE BUFFER 1            */
   rxbdu recvbd2;             /* RECEIVE BUFFER 2            */
   rxbdu recvbd3;             /* RECEIVE BUFFER 3            */
   txbdu xmitbd0;             /* TRANSMIT BUFFER             */
   };
struct descs *pdsc;           /* POINTER TO DESCRIPTORS      */
rxbdu *prxbd;                 /* POINTER TO RECEIVE BUF DESC */
static char *poem[6];         /* POEM AREA                   */
short linecntr;               /* LINE COUNTER                */

main()
{
   void intbrn();                   /* EXCEPTION SERVICE RTN */
   int *ptrs,*ptrd;                 /* SOURCE & DEST POINTERS*/

   pimm = (struct immbase *) (getimmr() & 0xFFFF0000);
                                     /* INIT PNTR TO IMMBASE  */
   ptrs = (int *) intbrn;            /* INIT SOURCE POINTER   */
   ptrd = (int *)(getevt() + 0x500); /* INIT DEST POINTER     */
   do                                /* MOVE ESR TO EVT       */
      *ptrd++ = *ptrs;               /* MOVE UNTIL            */
   while (*ptrs++ != 0x4c000064);    /* RFI INTRUCTION        */
   pimm->CICR = 0x1B9F00;            /* CPM INTERRUPTS LEVEL 4*/
                                     /* PC15 HIGHEST INT PRIOR*/
                                     /* SCC4,HIGHEST PRIORITY */
                                     /* SCC3,2ND HIGHEST PRIOR*/
                                     /* SCC2,2ND LOWEST PRIORI*/
                                     /* SCC1,LOWEST PRIORITY  */
   clrdpr();                         /* CLEAR DUAL PORT RAM   */
   pimm->PDDAT = 0;                  /* CLEAR PORT D DATA REG */
   pimm->PDDIR = 0xff;               /* MAKE PORT D8-15 OUTPUT*/
   pimm->SDCR = 1;                   /* SDMA U-BUS ARB PRI=5  */
   /* PAPAR, PADIR & PAODR are cleared at reset               */
   /* Port C configuration not required for internal loopback */
   pimm->BRGC2 = 0x10204;            /* ENABLE BRG2, 9600 BUAD*/
   pimm->SICR = 0x11;                /* CONNECT BRG2 TO SCC1  */
                                     /* RECV AND XMIT         */
   /* SICR.SC1 is zero from reset                             */
   pimm->SCC1.RBASE = 0x200;         /*RxBD AT IMMBASE+ 0x2200*/
   pimm->SCC1.TBASE = 0x220;         /*TxBD AT IMMBASE+ 0x2220*/
   pimm->SCC1.RFCR = 0x11;          /* SET FUNC CODES TO 0x11 */
   pimm->SCC1.TFCR = 0x11;
   pimm->SCC1.MRBLR = 50;           /* SET RECV BUF LGTH TO 50*/
   pimm->CPCR = 1;                  /* INIT Rx & Tx PARAMS    */
   /* MAX_IDL is initialized to 0 (disable close on idle) from*/
   /* reset                                                   */
   pimm->SCC1.UART.BRKCR = 1;       /* SEND 1 BRK CHAR ON ST X*/
   /* PAREC, FRMEC, NOSEC, & BRKEC are initialized to 0 from  */
   /* reset                                                   */
   /* UADDR1 and UADDR2 not used                              */
   /* TOSEQ is initialized to zero from reset                 */
   pimm->SCC1.UART.CHAR1 = 0;       /* INIT CNTRL CHAR FOR EOL*/
   pimm->SCC1.UART.CHAR2 = 0x8000;  /* END OF CHAR TABLE      */
   pimm->SCC1.UART.RCCM = 0xC0FF;   /* NO CONTROL CHARS MASKED*/
   pdsc = (struct descs *) ((int) pimm + 0x2200);
                                    /* INIT DESCRIPTOR PNTR   */
   prxbd = (rxbdu *) ((int) pimm + 0x2200);
                                    /* INIT RECV BD POINTER   */
   /* Recv data length fields initialized to 0 at reset       */
   pdsc->recvbd0.rxbdptr = (char *) ((int) pimm + 0x2240);
                                    /* RECV BD0 POINTER=0x2240*/
   pdsc->recvbd1.rxbdptr = (char *) ((int) pimm + 0x2280);
                                    /* RECV BD1 POINTER=0x2280*/
   pdsc->recvbd2.rxbdptr = (char *) ((int) pimm + 0x22C0);
                                    /* RECV BD2 POINTER=0x22C0*/
   pdsc->recvbd3.rxbdptr = (char *) ((int) pimm + 0x2300);
                                    /* RECV BD3 POINTER=0x2300*/
   pdsc->recvbd0.rxbdsac = 0x9000   /* BUFFER EMPTY,INT ENABLE*/
   pdsc->recvbd1.rxbdsac = 0x9000   /* BUFFER EMPTY,INT ENABLE*/
   pdsc->recvbd2.rxbdsac = 0x9000   /* BUFFER EMPTY,INT ENABLE*/
   pdsc->recvbd3.rxbdsac = 0xB000   /* BUFFER EMPTY,INT ENABLE*/
                                    /* LAST BUFFER            */
   /* Continuous mode field initialized to zero at reset      */
   /* Transmit data length field initialized to 0 at reset    */
   /* R, CR, CM, and P bits of Status & control are initial-  */
   /* ized to 0 at reset.                                     */
   pdsc->xmitbd0.txbdsac = 0x3000;  /* LAST BUFFER,INT ENABLED*/
   /* SCCE1 is cleared from reset                             */
   pimm->SCCM1 = 3;                 /* EN RECV,XMIT INTRS,SCC1*/
   pimm->CIMR |= 0x40000000;        /* SCC1 INTERRUPTS ENABLED*/
   pimm->SIMASK |= 0x40;            /* ENABLE LVL4 INTERRUPTS */
   pimm->CICR |= 0x80;              /* ENABLE CPM INTERRUPTS  */
   pimm->GSMR_H1 = 0x60;            /* SMALL FIFOS,RECV & XMIT*/
   pimm->GSMR_L1 = 0x28024;         /* 16X SAMPLING, LOOPBACK */
                                    /* UART MODE              */
   pimm->PSMR1 = 0x3000;            /* 8 BIT CHARACTERS       */
   pimm->GSMR_L1 |= 0x30;           /* ENABLE XMIT & RECV     */
   poem[0] = "Humpty Dumpty sat on a wall\n\r";
   poem[1] = "Humpty Dumpty had a great fall\n\r";
   poem[2] = "All the king's horses and all the king's men\n\r";
   poem[3] = "Couldn't put Humpty together again\n\r";
   poem[4] = "";
   poem[5] = "";
   linecntr = 0;                    /* INIT LINE COUNTER      */
   pdsc->xmitbd0.txbdptr = poem[linecntr];
                                     /* INIT XMIT POINTER     */
   pdsc->xmitbd0.txbdcnt = strlen(poem[linecntr]) + 1;
                                             /* INIT XMIT CNT */
   pdsc->xmitbd0.txbdsac |= 0x8000; /* SET XMIT IN BD         */
   asm (" mtspr 80,0");             /* ENABLE INTERRUPTS      */
   while ((pimm->GSMR_L1 & 0x20) == 1);
}

#pragma interrupt intbrn
void intbrn()
{
   void cpmesr();

   switch ((pimm->SIVEC)>>24)       /* PROCESS INTERRUPT CODE*/
   {
      case 0x24: asm(" bla cpmesr"); /* PROCESS LVL4 CODE    */
      break;
      default:;
   }
}

void cpmesr()
{
   short er;                 /* EVENT REGISTER SCRATCHPAD LOC*/

   pimm->CIVR |= 1;                 /* REQUEST VECTOR NUMBER */
   asm(