📄 read_write.c
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//
// NOTES:
// *** Called (and returns) with the WriteQueueLock held.
//
///////////////////////////////////////////////////////////////////////////////
VOID
OsrStartReadIrp(PDEVICE_OBJECT DeviceObject, PIRP Irp)
{
POSR_DEVICE_EXT devExt = DeviceObject->DeviceExtension;
PIO_STACK_LOCATION ioStack;
ULONG mapRegsNeeded;
ioStack = IoGetCurrentIrpStackLocation(Irp);
//
// In progress IRPs cannot be cancelled
//
IoSetCancelRoutine(Irp, NULL);
#if DBG
DbgPrint("OsrRead: Transfer length %d.\n",
ioStack->Parameters.Read.Length);
#endif
//
// There is no in-progress request. Start this request on the
// device.
//
devExt->CurrentReadIrp = Irp;
devExt->ReadTotalLength = ioStack->Parameters.Read.Length;
devExt->ReadSoFar = 0;
devExt->ReadStartingOffset = 0;
//
// Start the watchdog timer on this IRP
//
(ULONG)Irp->Tail.Overlay.DriverContext[0] = OSR_WATCHDOG_INTERVAL;
//
// Flush the requestor's buffer back from cache on non-dma coherent
// machines.
//
KeFlushIoBuffers(Irp->MdlAddress, TRUE, TRUE);
//
// Determine number of map registers required by this read
//
mapRegsNeeded =
ADDRESS_AND_SIZE_TO_SPAN_PAGES(MmGetMdlVirtualAddress(Irp->MdlAddress),
ioStack->Parameters.Read.Length);
#if DBG
DbgPrint("StartReadIrp: %d. map regs needed\n", mapRegsNeeded);
#endif
//
// Limit the number of map registers used to the maximum allowed by the
// HAL. We determined this max when we called HalGetAdapter() during
// our DriverEntry processing.
//
devExt->MapRegsThisRead = ((mapRegsNeeded > devExt->ReadMapRegsGot) ?
devExt->ReadMapRegsGot : mapRegsNeeded);
#if DBG
DbgPrint("StartReadIrp: %d. map regs this xfer\n", devExt->MapRegsThisRead);
#endif
IoAllocateAdapterChannel(devExt->ReadAdapter,
DeviceObject,
devExt->MapRegsThisRead,
OsrAdapterControlRead,
Irp);
}
///////////////////////////////////////////////////////////////////////////////
//
// OsrAdapterControlRead
//
// This is routine is called by the I/O Manager when the Adapter resources
// (such as map registers) requested by the OsrStartReadIrp function are
// available for our use.
//
// INPUTS:
//
// DeviceObject - Address of the DEVICE_OBJECT for our device.
//
// MapRegisterBase - Base address of the Map registers that have been
// reserved for us use.
//
// Context - address of the Read Irp for the operation to be started
//
// OUTPUTS:
//
// None.
//
// RETURNS:
//
// DeallocateObjectKeepRegisters - indicates that the Mapping Registers that
// were allocated to us should not be deallocated at this time. We
// will deallocate them from the DpcForIsr when the Read completes.
//
// IRQL:
//
// This routine is called at IRQL_DISPATCH_LEVEL.
//
// NOTES:
//
///////////////////////////////////////////////////////////////////////////////
IO_ALLOCATION_ACTION
OsrAdapterControlRead(IN PDEVICE_OBJECT DeviceObject, IN PIRP NotUsed,
IN PVOID MapRegisterBase, IN PVOID Context)
{
PIRP irp = (PIRP) Context;
PIO_STACK_LOCATION ioStack;
POSR_DEVICE_EXT devExt;
PUCHAR baseVa;
#if DBG
DbgPrint("AdapterControlRead: Irp = 0x%0x\n", irp);
DbgPrint("AdapterControlRead: Map Register Base = 0x%0x\n", MapRegisterBase);
#endif
devExt = DeviceObject->DeviceExtension;
ioStack = IoGetCurrentIrpStackLocation(irp);
devExt->ReadLength = ioStack->Parameters.Read.Length - devExt->ReadSoFar;
#if DBG
DbgPrint("AdapterControlRead: Length remaining = %d. \n", devExt->ReadLength);
#endif
//
// Get set-up for the transfer
//
devExt->ReadMapRegBase = MapRegisterBase;
devExt->ReadStartingOffset = devExt->ReadSoFar;
//
// Get requestor's virtual address of the buffer. This is used by
// IoMapTransfer() as an index into the buffer to track the progress
// of the map operation.
//
baseVa = MmGetMdlVirtualAddress(irp->MdlAddress);
//
// Get the logical base address and length of a fragment of the
// requestor's buffer.
//
// Even though we are a Busmaster device, our device does not support
// scatter/gather. Thus, we can only use a single base address and length
// at a time. If the requestor's buffer has more fragments, we will
// do additional DMA operations (one for each fragment) until the entire
// transfer has been completed.
//
devExt->ReadPaToDevice = IoMapTransfer(NULL,
irp->MdlAddress,
MapRegisterBase,
baseVa+(devExt->ReadSoFar),
&devExt->ReadLength,
FALSE); // FALSE = READ from device
//
// Track the length of the requestor's buffer we've read so far.
//
devExt->ReadSoFar += devExt->ReadLength;
//
// Start the request on the device -- Base Address and Length
// of this fragment are stored in the device extension
//
(VOID)KeSynchronizeExecution(devExt->InterruptObject,
OsrStartReadOnDevice,
DeviceObject);
return(DeallocateObjectKeepRegisters);
}
///////////////////////////////////////////////////////////////////////////////
//
// OsrAdapterControlWrite
//
// This is routine is called by the I/O Manager when the Adapter resources
// (such as map registers) requested by the OsrStartWriteIrp function are
// available for our use.
//
// INPUTS:
//
// DeviceObject - Address of the DEVICE_OBJECT for our device.
//
// MapRegisterBase - Base address of the Map registers that have been
// reserved by the I/O Manager and HAL for our use.
//
// Context - address of the Write Irp for the operation to be started on the
// device.
//
// OUTPUTS:
//
// None.
//
// RETURNS:
//
// DeallocateObjectKeepRegisters - indicates that the map registers that
// were allocated to us should not be deallocated at this time.
// We will deallocate them with the Read operation completes.
//
// IRQL:
//
// This routine is called at IRQL_DISPATCH_LEVEL.
//
// NOTES:
//
///////////////////////////////////////////////////////////////////////////////
IO_ALLOCATION_ACTION
OsrAdapterControlWrite(IN PDEVICE_OBJECT DeviceObject, IN PIRP NotUsed,
IN PVOID MapRegisterBase, IN PVOID Context)
{
PIRP irp = (PIRP) Context;
PIO_STACK_LOCATION ioStack;
POSR_DEVICE_EXT devExt;
PUCHAR baseVa;
#if DBG
DbgPrint("AdapterControlWrite: Irp = 0x%0x\n", irp);
#endif
devExt = DeviceObject->DeviceExtension;
ioStack = IoGetCurrentIrpStackLocation(irp);
devExt->WriteLength = ioStack->Parameters.Write.Length - devExt->WriteSoFar;
#if DBG
DbgPrint("AdapterControlWrite: Length remaining = %d. \n", devExt->WriteLength);
#endif
//
// Get set-up for the transfer
//
devExt->WriteMapRegBase = MapRegisterBase;
baseVa = MmGetMdlVirtualAddress(irp->MdlAddress);
devExt->WriteStartingOffset = devExt->WriteSoFar;
//
// Get the base address and length of the segment to write.
//
devExt->WritePaToDevice = IoMapTransfer(NULL,
irp->MdlAddress,
MapRegisterBase,
baseVa+(devExt->WriteSoFar),
&devExt->WriteLength,
TRUE); // WriteToDevice
//
// Update the length transfered so far
//
devExt->WriteSoFar += devExt->WriteLength;
//
// Put the request on the device
//
(VOID)KeSynchronizeExecution(devExt->InterruptObject,
OsrStartWriteOnDevice,
DeviceObject);
return(DeallocateObjectKeepRegisters);
}
///////////////////////////////////////////////////////////////////////////////
//
// OsrStartReadOnDevice
//
// This function performs all the actual hardware manipulation to initiate
// a new read request on the AMCC device. When called, all resources
// (mapping registers) have been allocated for the operation, and we have
// a base address and length of a buffer fragment to be DMA'ed.
//
// INPUTS:
//
// DeviceObject - Address of the DEVICE_OBJECT for our device.
//
// BaseAddress - Logical base address of the requestor's buffer fragment
// to be used as the base address of the transfer
//
// Length - Length in bytes of this fragment to be transfered.
//
// OUTPUTS:
//
// None.
//
// RETURNS:
//
// None.
//
// IRQL:
//
// This routine is called at IRQL_DISPATCH_LEVEL.
//
// NOTES:
//
// When this routine is called, no other Read operations are in progress on
// the device.
//
///////////////////////////////////////////////////////////////////////////////
BOOLEAN
OsrStartReadOnDevice(IN PVOID SynchronizeContext)
{
ULONG temp;
PDEVICE_OBJECT deviceObject = (PDEVICE_OBJECT)SynchronizeContext;
PHYSICAL_ADDRESS baseAddress;
ULONG length;
POSR_DEVICE_EXT devExt = deviceObject->DeviceExtension;
baseAddress = devExt->ReadPaToDevice;
length = devExt->ReadLength;
#if DBG
DbgPrint("StartReadOnDev: Reading BA = 0x%0x, Length = %d.\n",
baseAddress.LowPart, length);
#endif
//
// Pass the device the Physical Base Address of the buffer
//
ASSERT(!baseAddress.HighPart);
WRITE_PORT_ULONG(devExt->AmccBaseRegisterAddress+MWAR_OFF,
baseAddress.LowPart);
//
// ...and the length of the read
//
WRITE_PORT_ULONG(devExt->AmccBaseRegisterAddress+MWTC_OFF, length);
//
// Tell the device to interrupt when the read is complete.
//
// NOTE: In this particular device, "read" operations from the
// device are called "WRITE" operations... since they write to
// MEMORY. Thus, we set the INT_ON_WRITE bit in the Interrupt
// CSR.
//
temp = READ_PORT_ULONG(devExt->AmccBaseRegisterAddress+ICSR_OFF);
#if DBG
DbgPrint("StartDmaRead: Current INTCSR State:\n");
OsrPrintIntcsr(temp);
#endif
temp &= ~AMCC_INT_ACK_BITS;
temp |= AMCC_INT_INT_ON_WRITE;
WRITE_PORT_ULONG(devExt->AmccBaseRegisterAddress+ICSR_OFF, temp);
//
// Yeeeeha! Start the request by settting the "Write Enable"
// bit in the master CSR
//
temp = READ_PORT_ULONG(devExt->AmccBaseRegisterAddress+MCSR_OFF);
temp &= (AMCC_MCSR_READ_ENABLE |
AMCC_MCSR_READ_FIFO_MGMT |
AMCC_MCSR_READ_PRIORITY |
AMCC_MCSR_WRITE_ENABLE |
AMCC_MCSR_WRITE_FIFO_MGMT |
AMCC_MCSR_WRITE_PRIORITY);
temp |= AMCC_MCSR_WRITE_ENABLE;
WRITE_PORT_ULONG(devExt->AmccBaseRegisterAddress+MCSR_OFF, temp);
return(TRUE);
}
///////////////////////////////////////////////////////////////////////////////
//
// OsrStartWriteOnDevice
//
// This function performs all the actual hardware manipulation to initiate
// a new read request on the AMCC device. When called, all resources
// (mapping registers) have been allocated for the operation, and we have
// a base address and length of a buffer fragment to be DMA'ed.
//
// INPUTS:
//
// DeviceObject - Address of the DEVICE_OBJECT for our device.
//
// BaseAddress - Logical base address of the requestor's buffer fragment
// to be used as the base address of the transfer
//
// Length - Length in bytes of this fragment to be transfered.
//
// OUTPUTS:
//
// None.
//
// RETURNS:
//
// None.
//
// IRQL:
//
// This routine is called at IRQL_DISPATCH_LEVEL.
//
// NOTES:
//
// When this routine is called, no other Write operations are in progress on
// the device.
//
///////////////////////////////////////////////////////////////////////////////
BOOLEAN
OsrStartWriteOnDevice(IN PVOID SynchronizeContext)
{
ULONG temp;
PDEVICE_OBJECT deviceObject = (PDEVICE_OBJECT)SynchronizeContext;
PHYSICAL_ADDRESS baseAddress;
ULONG length;
POSR_DEVICE_EXT devExt = deviceObject->DeviceExtension;
baseAddress = devExt->WritePaToDevice;
length = devExt->WriteLength;
#if DBG
DbgPrint("StartWriteOnDev: Writing BA = 0x%0x, Length = %d.\n",
baseAddress.LowPart, length);
#endif
//
// Pass the device the Physical Base Address of the buffer...
//
ASSERT(!baseAddress.HighPart);
WRITE_PORT_ULONG(devExt->AmccBaseRegisterAddress+MRAR_OFF,
baseAddress.LowPart);
//
// ...and the length of the write operation
//
WRITE_PORT_ULONG(devExt->AmccBaseRegisterAddress+MRTC_OFF, length);
//
// Request the device interrupt when the write operation is complete
//
temp = READ_PORT_ULONG(devExt->AmccBaseRegisterAddress+ICSR_OFF);
#if DBG
DbgPrint("StartWriteOnDev: Current INTCSR State:\n");
OsrPrintIntcsr(temp);
#endif
temp &= ~AMCC_INT_ACK_BITS;
temp |= AMCC_INT_INT_ON_READ;
WRITE_PORT_ULONG(devExt->AmccBaseRegisterAddress+ICSR_OFF, temp);
//
// Yeeeeha! Start the request by setting the appropriate enable bit.
//
temp = READ_PORT_ULONG(devExt->AmccBaseRegisterAddress+MCSR_OFF);
temp &= (AMCC_MCSR_READ_ENABLE|
AMCC_MCSR_READ_FIFO_MGMT|
AMCC_MCSR_READ_PRIORITY|
AMCC_MCSR_WRITE_ENABLE|
AMCC_MCSR_WRITE_FIFO_MGMT|
AMCC_MCSR_WRITE_PRIORITY);
temp |= AMCC_MCSR_READ_ENABLE;
WRITE_PORT_ULONG(devExt->AmccBaseRegisterAddress+MCSR_OFF, temp);
return(TRUE);
}
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