cancel.c

PCI驱动程序开发示例。是我从OSR网站下载的

        // Found it!
        //
        if(irp->Cancel)  {
            break;
        }
    }

    //
    // If we exited the loop without finding an IRP to cancel, just
    // return NULL
    //
    if(entry == ListHead)  {
        return(NULL);
    }


    RemoveEntryList(entry);

    return(irp);
}    



///////////////////////////////////////////////////////////////////////////////
//
//
// OsrWatchdogTimer
//
//  This function is called once per second per device object support.
//  It's role is to check to ensure that the currently active read and write
//  requests don't "hang" on the device.  If either requests take longer
//  than the prescribed time to complete, this function cancels the request.
//
//  INPUTS:
//
//      DeviceObject - Address of our DEVICE_OBJECT.
//
//      Context - Not used.
//
//  OUTPUTS:
//
//      None.
//
//  RETURNS:
//
//    None.
//
//  IRQL:
//
//    This routine is called at IRQL DISPATCH_LEVEL
//
//  NOTES:
//
//
///////////////////////////////////////////////////////////////////////////////
VOID
OsrWatchdogTimer(PDEVICE_OBJECT DeviceObject,
                 PVOID Context) 
{
    POSR_DEVICE_EXT devExt;
    KIRQL oldIrql;

    devExt = DeviceObject->DeviceExtension;

    //
    // Take out the read queue lock while checking the in-progress write
    //
    //
    KeAcquireSpinLock(&devExt->WriteQueueLock, &oldIrql);

    //
    // If there's a write operation in progress
    //
    if(devExt->CurrentWriteIrp) {

        //
        // If the watchdog count on the current write IRP has expired
        //
        if(! --((ULONG)(devExt->CurrentWriteIrp->Tail.Overlay.DriverContext[0])) ) {

#if DBG
            DbgPrint("OsrWatchdogTimer: WRITE killed 0x%0x\n", devExt->CurrentWriteIrp);
#endif
            //            
            // Soft reset the write processing on this device, and
            // queue a DpcForIsr() to cancel the in progress request.
            //
            (void)KeSynchronizeExecution(devExt->InterruptObject,
                                    CancelInProgressWrite,
                                    devExt);
        }

    }

    //
    // Drop the lock
    //
    KeReleaseSpinLock(&devExt->WriteQueueLock, oldIrql);


    //
    // Take out the read queue lock while checking the in-progress write
    //
    //
    KeAcquireSpinLock(&devExt->ReadQueueLock, &oldIrql);

    //
    // If there's a write operation in progress
    //
    if(devExt->CurrentReadIrp) {

        //
        // If the watchdog count on the current write IRP has expired
        //
        if(! --((ULONG)(devExt->CurrentReadIrp->Tail.Overlay.DriverContext[0])) ) {

#if DBG
            DbgPrint("OsrWatchdogTimer: READ killed 0x%0x\n", devExt->CurrentReadIrp);
#endif
            //            
            // Soft reset the write processing on this device, and
            // queue a DpcForIsr() to cancel the in progress request.
            //
            (void)KeSynchronizeExecution(devExt->InterruptObject,
                                    CancelInProgressRead,
                                    devExt);
        }

    }

    //
    // Drop the lock
    //
    KeReleaseSpinLock(&devExt->ReadQueueLock, oldIrql);

}

///////////////////////////////////////////////////////////////////////////////
//
// CancelInProgressRead
//
//    This is a synchronize function, called with the ISR spinlock, and the
//    read queue spin lock HELD.
//    Returns with these locks HELD.
//
//  INPUTS:
//
//      SynchronizeContext - Address of our device extension.
//
//  OUTPUTS:
//
//      None.
//
//  RETURNS:
//
//      TRUE.
//
//  IRQL:
//
//      DIRQL
//
//  NOTES:
//
//
///////////////////////////////////////////////////////////////////////////////
BOOLEAN
CancelInProgressRead(IN PVOID SynchronizeContext)
{
    POSR_DEVICE_EXT devExt = (POSR_DEVICE_EXT)SynchronizeContext;
    ULONG temp;

    //
    // Get the current MCSR register value, mask off the bits that need
    // to be preserved, and CLEAR the WRITE_ENABLE bit... thus STOPPING
    // the transfer dead in its tracks. (Yes, it IS WRITE_ENABLE)
    //
    temp = READ_PORT_ULONG(devExt->AmccBaseRegisterAddress+MCSR_OFF);

    //
    // Preserve these bits
    //
    temp &= (AMCC_MCSR_READ_ENABLE|
                AMCC_MCSR_READ_FIFO_MGMT|
                AMCC_MCSR_READ_PRIORITY|
                AMCC_MCSR_WRITE_ENABLE|
                AMCC_MCSR_WRITE_FIFO_MGMT|
                AMCC_MCSR_WRITE_PRIORITY);
    //
    // Clear this bit
    //
    temp &= ~AMCC_MCSR_WRITE_ENABLE;

    //
    // DO it on the device
    //
    WRITE_PORT_ULONG(devExt->AmccBaseRegisterAddress+MCSR_OFF, temp); 

    //
    // Indicate the read is complete (setting _WRITE_COMP bit)
    //
    devExt->IntCsr |= AMCC_INT_WRITE_COMP;

    //
    // Indicate to the DpcforIsr that the request is being
    // cancelled.  The DpcForIsr specifically looks at the
    // ReadTotalLength flag to determine if the requsest is being
    // cancelled.
    //
    devExt->ReadTotalLength = 0;
    devExt->ReadSoFar = 0;
    
    //
    // Request the DPC for ISR, just as if the read were
    // ordinarily completing.  NOTE: NO CHANCE OF RACE HERE, since
    // we're HOLDING THE ISR SPINLOCK.
    //
    IoRequestDpc(devExt->DeviceObject, 0, NULL);

    return(TRUE);
}    

///////////////////////////////////////////////////////////////////////////////
//
// CancelInProgressWrite
//
//    This is a synchronize function, called with the ISR spinlock,and the write
//    queue spin lock ALL HELD. Returns with these locks HELD.
//
//  INPUTS:
//
//      SynchronizeContext - Address of our device extension.
//
//  OUTPUTS:
//
//      None.
//
//  RETURNS:
//
//    TRUE.
//
//  IRQL:
//
//      DIRQL
//
//  NOTES:
//
//
///////////////////////////////////////////////////////////////////////////////
BOOLEAN
CancelInProgressWrite(IN PVOID SynchronizeContext)
{
    POSR_DEVICE_EXT devExt = (POSR_DEVICE_EXT)SynchronizeContext;
    ULONG temp;

    //
    // Get the current MCSR register value, mask off the bits that need
    // to be preserved, and CLEAR the READ_ENABLE bit... thus STOPPING
    // the transfer dead in its tracks.
    //
    temp = READ_PORT_ULONG(devExt->AmccBaseRegisterAddress+MCSR_OFF);

    //
    // Preserve these bits
    //
    temp &= (AMCC_MCSR_READ_ENABLE|
                AMCC_MCSR_READ_FIFO_MGMT|
                AMCC_MCSR_READ_PRIORITY|
                AMCC_MCSR_WRITE_ENABLE|
                AMCC_MCSR_WRITE_FIFO_MGMT|
                AMCC_MCSR_WRITE_PRIORITY);

    //
    // Clearing READ_ENABLE stops the WRITE operation
    //
    temp &= ~AMCC_MCSR_READ_ENABLE;

    //
    // Tell it to the device
    //
    WRITE_PORT_ULONG(devExt->AmccBaseRegisterAddress+MCSR_OFF, temp); 

    //
    // Fake the write completion by setting the appropriate bit in
    // our private copy of the IntCSR
    //
    devExt->IntCsr |= AMCC_INT_READ_COMP;

    //
    // Indicate to the DPC for ISR that the request is being
    // cancelled
    //
    devExt->WriteTotalLength = 0;
    devExt->WriteSoFar = 0;
    
    //
    // Request the DPC for ISR, just as if the read were
    // ordinarily completing.
    //
    IoRequestDpc(devExt->DeviceObject, 0, NULL);

    return(TRUE);
}