cache_asm.arm

This zip describes a benchmark software provided by IXXAT. It shows how to use the DBGU and timer pe

;------------------------------------------------------------------------------
;-         ATMEL Microcontroller Software Support  -  ROUSSET  -
;------------------------------------------------------------------------------
; The software is delivered "AS IS" without warranty or condition of any
; kind, either express, implied or statutory. This includes without
; limitation any warranty or condition with respect to merchantability or
; fitness for any particular purpose, or against the infringements of
; intellectual property rights of others.
;-----------------------------------------------------------------------------
;- File source          : cache_asm.arm
;- Object               : Generic CStartup for Ram run
;- Compilation flag     : None
;-
;- 1.0 06/Jun/03 	JPP : Creation Green Hills 3.6
;------------------------------------------------------------------------------

        .file   "cache_asm.arm"

        .nothumb

;------------------------------------------------------------------------------
;- Area Definition
;-----------------
;- Must be defined as function to put first in the code as it must be mapped
;- at offset 0 of the flash EBI_CSR0, ie. at address 0 before remap.
;------------------------------------------------------------------------------
    .section ".text", .text
    .align  4

;-----------------------------------------------------------------------------

;-----------------------------------------------------------------------------
;- \fn    AT91F_ARM_WriteControl
;- \brief Write Control register
;-----------------------------------------------------------------------------
;- extern  void AT91F_ARM_WriteControl(unsigned int ctl)
    .globl	AT91F_ARM_WriteControl
AT91F_ARM_WriteControl:

 	MCR p15, 0, r0, c1, c0, 0

		mov	 pc,lr
       .type   AT91F_ARM_WriteControl,$function
       .size   AT91F_ARM_WriteControl,.-AT91F_ARM_WriteControl

;-----------------------------------------------------------------------------
;- \fn    AT91F_ARM_ReadControl
;- \brief Read Control register
;-----------------------------------------------------------------------------
;- extern  unsigned int AT91F_ARM_ReadControl()
    .globl	AT91F_ARM_ReadControl
AT91F_ARM_ReadControl:

 	MRC p15, 0, r0, c1, c0, 0

		mov	 pc,lr
       .type   AT91F_ARM_ReadControl,$function
       .size   AT91F_ARM_ReadControl,.-AT91F_ARM_ReadControl
;-----------------------------------------------------------------------------
;- \fn    AT91F_ARM_InvalidateDCache
;- \brief Invalidate DCache
;-----------------------------------------------------------------------------
;- extern  void AT91F_ARM_InvalidateDCache()
    .globl	AT91F_ARM_InvalidateDCache
AT91F_ARM_InvalidateDCache:

		mov	r0,0

 	MCR p15, 0, r0, c7, c6, 0

		mov	 pc,lr
       .type   AT91F_ARM_InvalidateDCache,$function
       .size   AT91F_ARM_InvalidateDCache,.-AT91F_ARM_InvalidateDCache

;-----------------------------------------------------------------------------
;- \fn    AT91F_ARM_InvalidateDTLB
;- \brief Invalidate D TLB
;-----------------------------------------------------------------------------
;- extern  void AT91F_ARM_InvalidateDTLB()
    .globl	AT91F_ARM_InvalidateDTLB
AT91F_ARM_InvalidateDTLB :

		mov	r0,0
 	MCR p15, 0, r0, c8, c6, 0

		mov	 pc,lr
       .type   AT91F_ARM_InvalidateDTLB,$function
       .size   AT91F_ARM_InvalidateDTLB,.-AT91F_ARM_InvalidateDTLB

;-----------------------------------------------------------------------------
;- \fn    AT91F_ARM_DrainWriteBuffer
;- \brief Drain Write Buffer
;-----------------------------------------------------------------------------
;- extern  void AT91F_ARM_DrainWriteBuffer()
    .globl	AT91F_ARM_DrainWriteBuffer
AT91F_ARM_DrainWriteBuffer:

		mov	r0,0

 	MCR p15, 0, r0, c7, c10, 4

		mov	 pc,lr
       .type   AT91F_ARM_DrainWriteBuffer,$function
       .size   AT91F_ARM_DrainWriteBuffer,.-AT91F_ARM_DrainWriteBuffer

;-----------------------------------------------------------------------------
;- \fn    AT91F_ARM_InvalidateICache
;- \brief Invalidate ICache
;-----------------------------------------------------------------------------
;- extern  void AT91F_ARM_InvalidateICache()
    .globl	AT91F_ARM_InvalidateICache
AT91F_ARM_InvalidateICache:

		mov	r0,0

 	MCR p15, 0, r0, c7, c5, 0

		mov	 pc,lr
       .type   AT91F_ARM_InvalidateICache,$function
       .size   AT91F_ARM_InvalidateICache,.-AT91F_ARM_InvalidateICache

;-----------------------------------------------------------------------------
;- \fn    AT91F_ARM_InvalidateITLB
;- \brief Invalidate I TLB
;-----------------------------------------------------------------------------
;- extern  void AT91F_ARM_InvalidateITLB()
    .globl	AT91F_ARM_InvalidateITLB
AT91F_ARM_InvalidateITLB:

		mov	r0,0

 	MCR p15, 0, r0, c8, c5, 0

		mov	 pc,lr
       .type   AT91F_ARM_InvalidateITLB,$function
       .size   AT91F_ARM_InvalidateITLB,.-AT91F_ARM_InvalidateITLB


;-----------------------------------------------------------------------------
;- \fn    AT91F_ARM_CleanDCacheIDX
;- \brief Clean DCache single entry (using index)
;-----------------------------------------------------------------------------
;- extern  void AT91F_ARM_CleanDCacheIDX(unsigned int index)
    .globl	AT91F_ARM_CleanDCacheIDX
AT91F_ARM_CleanDCacheIDX:

		ldr		r1,=0xFC0000E0
		and		r0,R0,R1

 	MCR p15, 0, r0, c7, c10, 2

		mov	 pc,lr
       .type   AT91F_ARM_CleanDCacheIDX,$function
       .size   AT91F_ARM_CleanDCacheIDX,.-AT91F_ARM_CleanDCacheIDX


            END