main.c

This zip describes how two SSCs in I2S mode play and record wave files through a two-input data meth

	  if ( pool ==1)
	  {
	  *AT91C_SSC1_THR = data_out;   /* Write the TD data */
	  while((*AT91C_SSC1_SR & AT91C_SSC_RXRDY)==0){ } /* Wait ready */
	  data_in[0]= *AT91C_SSC1_RHR ; /* Read for test without shift*/
	  while((*AT91C_SSC1_SR & AT91C_SSC_TXRDY)==0){ } /* Wait ready */	  

	  *AT91C_SSC1_THR = data_out0;   /* Write the TD data */
	  data_in[1]= *AT91C_SSC1_RHR <<1 ; /* Read and shift*/
	  while((*AT91C_SSC1_SR & AT91C_SSC_TXRDY)==0){ } /* Wait ready */	  

	  }
	 if (AT91F_US_Get(&value) == 0 ) menu(value);
	}
}

//*--------------------------------------------------------------------------------------
//* Function Name       : I2S_mode_output32Bit_Input2wayBits
//* Object              : Write 2 data and read 1 data in fist SSC in I2S ei left way
//*			  and read write way on other I2S
//*			  for 
//* Input Parameters    : none. 
//* Output Parameters   : none.
//*--------------------------------------------------------------------------------------
void I2S_mode_output32Bit_Input2wayBits(void)
{
    char value;

    // ========================= Init SSC1 in Input Output mode ========================== 
    //* Configure SSC1 PIOs  TF/TK/TD  & RD and must connect RD0/RD1 RK0/TK1 RK0/TK1
	*AT91C_PIOB_PDR= ((unsigned int) AT91C_PB9_RD1     ) |
			 ((unsigned int) AT91C_PB7_TK1     ) |
			 ((unsigned int) AT91C_PB8_TD1     ) |
			 ((unsigned int) AT91C_PB6_TF1     );
    //* Configure PMC by enabling SSC1 clock  
       	*AT91C_PMC_PCER |= 1 << AT91C_ID_SSC1;    /* enable the SSC1 peripheral clock */
    //* Reset All the Peripheral 
     	*AT91C_SSC1_CR = AT91C_SSC_SWRST ;
    //* Clear Transmit and Receive Counters
	AT91F_PDC_Close((AT91PS_PDC) &(pSSC->SSC_RPR));
    //* Define the Clock Mode Register
    // for MCK ei 60000000 => 21 
        *AT91C_SSC1_CMR = 21;        

    //* Write the Recivier Frame Mode Register
	*AT91C_SSC1_RCMR = AT91C_SSC_CKS_TK |   // Use TK clock
   		((1<<16) & AT91C_SSC_STTDLY)|
		          0x1 << 8          |   // Start ON TX
		           AT91C_SSC_CKI    |   // Rissing edge
		          AT91C_SSC_START_TX; 

	*AT91C_SSC1_RFMR = 
		  ((1-1) <<8) & AT91C_SSC_DATNB |        // 1 Word by frame
                                 AT91C_SSC_MSBF |
				 (16-1);		 // 31 bits
    //* Write the Transmit Frame Mode Register
        *AT91C_SSC1_TCMR =  ((((BITS_BY_SLOT*SLOT_BY_FRAME)/2) -1) <<24) |
   		   ((1<<16) & AT91C_SSC_STTDLY) |
		   AT91C_SSC_START_FALL_RF | 
		   AT91C_SSC_CKO_CONTINOUS | 	// continuous transmit clock
		   AT91C_SSC_CKS_DIV; 		// Divided clock
    //set AT91C_SSC_STTOUT in TCMT +\  with out no work FOR VERSION BEFORE Rev F
        *AT91C_SSC1_TFMR =  
     		AT91C_SSC_FSOS_NEGATIVE 	|
		(((BITS_BY_SLOT-1)<<16) & AT91C_SSC_FSLEN)  |   // Fslen => 16 Clock
		(((SLOT_BY_FRAME-1)<<8) & AT91C_SSC_DATNB) |   // 2 Word by frame
		 AT91C_SSC_MSBF	    		|	// MSB in first
		 (BITS_BY_SLOT-1) ;		// 16 bits

	//* Enable TX & RX
	*AT91C_SSC1_CR = AT91C_SSC_TXEN | AT91C_SSC_RXEN;    /* Enable Tx */

    // ========================= Init SSC0 in Input mode ========================== 
    //* Configure SSC0 PIOs must connect RD0/RD1 RK0/TK1 RK0/TK1
	*AT91C_PIOB_PDR= ((unsigned int) AT91C_PB3_RD0     ) |
			 ((unsigned int) AT91C_PB4_RK0     ) |
			 ((unsigned int) AT91C_PB5_RF0     );
// DK Board connection
// AT91C_PB3_RD0	J5 09 => 3 & 4 (AT91C_PB9_RD1 AT91C_PB8_TD1)
// AT91C_PB4_RK0	J5 08 => 5 (AT91C_PB7_TK1)
// AT91C_PB5_RF0	J5 07 => 6 (AT91C_PB6_TF1)

    //* Configure PMC by enabling SSC0 clock  
       	*AT91C_PMC_PCER |= 1 << AT91C_ID_SSC0;    /* enable the SSC0 peripheral clock */
    //* Reset All the Peripheral 
     	*AT91C_SSC0_CR = AT91C_SSC_SWRST ;
  
    //* Write the Recivier Frame Mode Register
	*AT91C_SSC0_RCMR = AT91C_SSC_CKS_RK |   // Use RK PIN clock
			AT91C_SSC_CKO_NONE  |	// Use RK PIN clock
		           AT91C_SSC_CKI    |   // Rissing edge
		 AT91C_SSC_START_RISE_RF    |   // inverte from SSC1 
               ((1<<16) & AT91C_SSC_STTDLY) ;

	*AT91C_SSC0_RFMR = AT91C_SSC_FSOS_NONE  |        // input
		  ((1-1) <<8) & AT91C_SSC_DATNB |        // Get 1 word by frame
                                 AT91C_SSC_MSBF |        // MSB in First
				 (16-1);		 // Word Len 16 bits
	//* Enable TX & RX
	*AT91C_SSC0_CR = AT91C_SSC_RXEN;    /* Enable Tx */

    // =============================== Test ===================================
	data_out= 0xAAAF;
	data_out0= 0xF0F1;
	pool =1;
	while (1)
	{
	  if ( pool ==1)
	  {
	  *AT91C_SSC1_THR = data_out;   /* Write the TD data */

	  while((*AT91C_SSC1_SR & AT91C_SSC_RXRDY)==0){ } /* Wait ready */
	  data_in[0]= *AT91C_SSC1_RHR ; /* Read for test without shift*/
	  
	  while((*AT91C_SSC1_SR & AT91C_SSC_TXRDY)==0){ } /* Wait ready */	  
	  *AT91C_SSC1_THR = data_out0;   /* Write the TD data */

	  while((*AT91C_SSC0_SR & AT91C_SSC_RXRDY)==0){ } /* Wait ready */
	  data_in[1]= *AT91C_SSC0_RHR  ; /* Read */

	  while((*AT91C_SSC1_SR & AT91C_SSC_TXRDY)==0){ } /* Wait ready */	  

	  }
	 if (AT91F_US_Get(&value) == 0 ) menu(value);
	}
}

//*--------------------------------------------------------------------------------------
//* Function Name       : dsp_mode
//* Object              : Write and read in dsp_mode
//* Input Parameters    : none. 
//* Output Parameters   : none.
//*--------------------------------------------------------------------------------------
void dsp_mode(void)
{
    char value;
    //* Configure SSC1 PIOs  TF/TK/TD  & RD and must loop RD/TD
	*AT91C_PIOB_PDR= ((unsigned int) AT91C_PB9_RD1     ) |
			 ((unsigned int) AT91C_PB7_TK1     ) |
			 ((unsigned int) AT91C_PB8_TD1     ) |
			 ((unsigned int) AT91C_PB6_TF1     );

    //* Configure PMC by enabling SSC1 clock  
       	*AT91C_PMC_PCER |= 1 << AT91C_ID_SSC1;    /* enable the SSC1 peripheral clock */
    //* Reset All the Peripheral 
     	*AT91C_SSC1_CR = AT91C_SSC_SWRST ;
    //* Clear Transmit and Receive Counters
	AT91F_PDC_Close((AT91PS_PDC) &(pSSC->SSC_RPR));
    //* Define the Clock Mode Register
    // for MCK ei 60000000 => 21 
      *AT91C_SSC1_CMR = 21;        
  
	*AT91C_SSC1_RCMR = AT91C_SSC_CKS_TK | 
		          0x1 << 8          |    // Start ON TX
		          AT91C_SSC_START_TX; 

	*AT91C_SSC1_RFMR = 
		  ((1-1) <<8) & AT91C_SSC_DATNB |        // 1 Word by frame
                                AT91C_SSC_MSBF |
				 (31-1);		 // 31 bits
       *AT91C_SSC1_TCMR =    0x10 <<24 |    // perio 32 bits send more for reciveied
		      AT91C_SSC_STTOUT |
		      0x5 << 8         |    // Start
		      AT91C_SSC_CKI    |    // Rissing edge
		     AT91C_SSC_CKO_CONTINOUS | 	// continuous transmit clock
		     AT91C_SSC_CKS_DIV;        // Divided clock

	*AT91C_SSC1_TFMR = AT91C_SSC_FSOS_POSITIVE  |   // Positive pulse
		  ((1-1)  << 16 )& AT91C_SSC_FSLEN |   // Fslen => 1 Clock
		  ((2-1)  << 8)  & AT91C_SSC_DATNB |   // 2 Word by frame
		 AT91C_SSC_MSBF	    |	// MSB in first
		 AT91C_SSC_DATDEF   |   // Data def => 1 
		 (16-1);		// 16 bits
	//* Enable TX & RX
	*AT91C_SSC1_CR = AT91C_SSC_TXEN | AT91C_SSC_RXEN;    /* Enable Tx */

	data_out= 0xAAAA;
	data_out0= 0xF0F0;
	pool =1;
	while (1)
	{
	  if ( pool ==1)
	  {
	  *AT91C_SSC1_THR = data_out;   /* Write the TD data */
	  while((*AT91C_SSC1_SR & AT91C_SSC_RXRDY)==0){ } /* Wait ready */
	  data_in[0]= *AT91C_SSC1_RHR ;
	  while((*AT91C_SSC1_SR & AT91C_SSC_TXRDY)==0){ } /* Wait ready */	  

	  *AT91C_SSC1_THR = data_out0;   /* Write the TD data */
	  data_in[1]= *AT91C_SSC1_RHR <<1 ;
	  while((*AT91C_SSC1_SR & AT91C_SSC_TXRDY)==0){ } /* Wait ready */	  

	  }
	 if (AT91F_US_Get(&value) == 0 ) menu(value);
	}
}


//*--------------------------------------------------------------------------------------
//* Function Name       : Main
//* Object              : Software entry point 
//* Input Parameters    : none. 
//* Output Parameters   : none.
//*--------------------------------------------------------------------------------------
int main()
{

    char value;
 	
	debug_message();
 	pool =0;
	AT91F_US_EnableRx((AT91PS_USART) AT91C_BASE_DBGU);
			
	AT91F_DBGU_Printk("Check the output on J5 !!! (loop mode)\n\r");

	while (1)
	{
	  if ( pool ==1)
	  {
	  *AT91C_SSC1_THR = data_out;   /* Write the TD data */
	  while((*AT91C_SSC1_SR & AT91C_SSC_TXRDY)==0){ } /* Wait ready */	  
	  *AT91C_SSC1_THR = data_out0;   /* Write the TD data */
	  while((*AT91C_SSC1_SR & AT91C_SSC_TXRDY)==0){ } /* Wait ready */	  
	  }
	 if (AT91F_US_Get(&value) == 0 ) menu(value);
	}
}