📄 cstartup.arm
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;------------------------------------------------------------------------------
;- ATMEL Microcontroller Software Support - ROUSSET -
;------------------------------------------------------------------------------
; The software is delivered "AS IS" without warranty or condition of any
; kind, either express, implied or statutory. This includes without
; limitation any warranty or condition with respect to merchantability or
; fitness for any particular purpose, or against the infringements of
; intellectual property rights of others.
;-----------------------------------------------------------------------------
;- File source : cstartup_ram.arm
;- Object : Generic CStartup for Ram run
;- Compilation flag : None
;-
;- 1.0 18/Mar/03 JPP : Creation Green Hills 3.6
;------------------------------------------------------------------------------
.file "Cstartup_ram.arm"
.nothumb
#include "include/AT91RM9200_inc.h"
;--------------------------------
;- ARM Core Mode and Status Bits
;--------------------------------
ARM_MODE_USER EQU 0x10
ARM_MODE_FIQ EQU 0x11
ARM_MODE_IRQ EQU 0x12
ARM_MODE_SVC EQU 0x13
ARM_MODE_ABORT EQU 0x17
ARM_MODE_UNDEF EQU 0x1B
ARM_MODE_SYS EQU 0x1F
I_BIT EQU 0x80
F_BIT EQU 0x40
T_BIT EQU 0x20
;------------------------------------------------------------------------------
;- Area Definition
;-----------------
;- Must be defined as function to put first in the code as it must be mapped
;- at offset 0 of the flash EBI_CSR0, ie. at address 0 before remap.
;------------------------------------------------------------------------------
.section ".reset", .text
.align 4
.globl __reset
__reset:
;------------------------------------------------------------------------------
;- Exception vectors ( before Remap )
;------------------------------------
;- These vectors are read at address 0.
;- They absolutely requires to be in relative addresssing mode in order to
;- guarantee a valid jump. For the moment, all are just looping (what may be
;- dangerous in a final system). If an exception occurs before remap, this
;- would result in an infinite loop.
;------------------------------------------------------------------------------
B InitReset ; reset
undefvec
B undefvec ; 0x04 Undefined Instruction
swivec
B swivec ; 0x08 Software Interrupt
pabtvec
B pabtvec ; 0x0c Prefetch Abort
dabtvec
B dabtvec ; 0x10 Data Abort
rsvdvec
B rsvdvec ; 0x14 reserved
irqvec
ldr pc, [pc,#-0xF20] ; 0x18 IRQ : read the AIC
fiqvec
B fiqvec ; 0x1c FIQ
;-------------------
;- The reset handler
;-------------------
InitReset
;------------------------------------------------------------------------------
;- Stack Sizes Definition
;------------------------
;- Interrupt Stack requires 2 words x 8 priority level x 4 bytes when using
;- the vectoring. This assume that the IRQ_ENTRY/IRQ_EXIT macro are used.
;- The Interrupt Stack must be adjusted depending on the interrupt handlers.
;- Fast Interrupt not requires stack If in your application it required you must
;- be define here.
;- Other stacks are defined by default to save one word each.
;- The System stack size is not defined and is limited by the free internal
;- SRAM.
;- User stack size is not defined and is limited by the free external SRAM.
;------------------------------------------------------------------------------
;------------------------------------------------------------------------------
;- Setup the stack for each mode
;-------------------------
;- The processor will remain in the last initialized mode.
;------------------------------------------------------------------------------
IRQ_STACK_SIZE EQU (3*8*4) ; 3 words per interrupt priority level
FIQ_STACK_SIZE EQU (3*4) ; 3 word
ABT_STACK_SIZE EQU (3*4) ; 3 word
UND_STACK_SIZE EQU (3*4) ; 3 word
SVC_STACK_SIZE EQU (3*4) ; 3 word
USER_STACK_SIZE EQU (3*4) ;(ARM_MODE_SYS)
TOTAL_STACK_SIZE EQU (3*13*4) ;156
;------------------------------------------------------------------------------
;- Setup the stack for each mode
;-------------------------------
.import __ghsend_InterruptStack
ldr r0, =__ghsend_InterruptStack
;- Set up Supervisor Mode and set Supervisor Mode Stack
msr CPSR_c, #ARM_MODE_SVC | I_BIT
mov r13, r0 ; Init stack Undef
sub r0, r0, #SVC_STACK_SIZE
;- Set up Interrupt Mode and set IRQ Mode Stack
msr CPSR_c, #ARM_MODE_IRQ | I_BIT | F_BIT
mov r13, r0 ; Init stack IRQ
sub r0, r0, #IRQ_STACK_SIZE
;- Set up Fast Interrupt Mode and set FIQ Mode Stack
msr CPSR_c, #ARM_MODE_FIQ | I_BIT | F_BIT
mov r13, r0 ; Init stack FIQ
sub r0, r0, #FIQ_STACK_SIZE
;- Set up Abort Mode and set Abort Mode Stack
msr CPSR_c, #ARM_MODE_ABORT | I_BIT | F_BIT
mov r13, r0 ; Init stack Abort
sub r0, r0, #ABT_STACK_SIZE
;- Set up Undefined Instruction Mode and set Undef Mode Stack
msr CPSR_c, #ARM_MODE_UNDEF | I_BIT | F_BIT
mov r13, r0 ; Init stack Undef
sub r0, r0, #UND_STACK_SIZE
;- Set up user Mode and set System Mode Stack
msr CPSR_c, #ARM_MODE_SYS | F_BIT
bic r0, r0, #3 ; Insure word alignement
mov sp, r0 ; Init stack System
;------------------------------------------------------------------------------
;-Low level Init (PMC, AIC, EBI, ....)
;------------------------------------------------------------------------------
.import AT91F_LowLevelInit
ldr r0, = AT91F_LowLevelInit
mov lr, pc
bx r0
;----------------------------------------
; Read/modify/write CP15 control register
;----------------------------------------
MRC p15, 0, r0, c1, c0,0 ; read cp15 control registre (cp15 r1) in r0
ldr r3, =0xC0000080 ; Reset bit :Little Endian end fast bus mode
ldr r4, =0xC0000000 ; Set bit :Asynchronous clock mode, Not Fast Bus
BIC r0, r0, r3
ORR r0, r0, r4
MCR p15, 0, r0, c1, c0,0 ; write r0 in cp15 control registre (cp15 r1)
;------------------------------------------------------------------------------
;- Branch on C code Main function (with interworking)
;----------------------------------------------------
;- Branch must be performed by an interworking call as either an ARM or Thumb
;- _start function must be supported. This makes the code not position-
;- independent. A Branch with link would generate errors
;------------------------------------------------------------------------------
;- Get Green Hills Linker Values
.import _start
.import __ghsend_stack
.import __ghsbegin_picbase
;- Get Value for Rom/Copy
;- minimum C initialization
ldr r4, = _start
mov r0,0
mov r1,r0
mov r2,r0
;- Load The Green Hills register
ldr r9,= __ghsbegin_picbase
ldr r13,= __ghsend_stack
;- Branch to _start by interworking
mov lr, pc
bx r4
;------------------------------------------------------------------------------
;- Loop for ever
;---------------
;- End of application. Normally, never occur.
;- Could jump on Software Reset ( B 0x0 ).
;------------------------------------------------------------------------------
End:
b End
.type InitReset,$function
.size InitReset,.-InitReset
END
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