📄 os_cpu_c.c
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/********************************************************************************************************
; SAVE THE CCR AND DISABLE INTERRUPTS
; &
; RESTORE CCR
;
; Description : These function implements OS_CRITICAL_METHOD #3
;
; Arguments : The function prototypes for the two functions are:
; 1) OS_CPU_SR OSCPUSaveSR(void)
; where OS_CPU_SR is the contents of the CCR register prior to disabling
; interrupts.
; 2) void OSCPURestoreSR(OS_CPU_SR os_cpu_sr);
; 'os_cpu_sr' the the value of the CCR to restore.
;
; Note(s) : 1) It's assumed that the compiler uses the B register to pass a single 8-bit argument
; to and from an assembly language function.
;********************************************************************************************************/
void near OSCPUSaveSR(OS_CPU_SR *os_cpu_sr)
{
__asm__ __volatile__ ("tpa");
__asm__ __volatile__ ("staa _os_cpu_sr");
*os_cpu_sr = _os_cpu_sr; // add this code by Hansol Park. 2006. 1. 12
__asm__ __volatile__ ("sei");
}
void near OSCPURestoreSR(OS_CPU_SR os_cpu_sr)
{
_os_cpu_sr = os_cpu_sr; // add this code by Hansol Park. 2006. 1. 12
__asm__ __volatile__ ("ldaa _os_cpu_sr");
__asm__ __volatile__ ("tap");
}
/*********************************************************************************************************
;********************************************************************************************************
; START HIGHEST PRIORITY TASK READY-TO-RUN
;
; Description : This function is called by OSStart() to start the highest priority task that was created
; by your application before calling OSStart().
;
; Arguments : none
;
; Note(s) : 1) The stack frame is assumed to look as follows:
;
; OSTCBHighRdy->OSTCBStkPtr + 0 --> PPAGE
; + 1 CCR
; + 2 B
; + 3 A
; + 4 X (H)
; + 5 X (L)
; + 6 Y (H)
; + 7 Y (L)
; + 8 PC(H)
; + 9 PC(L)
;
; 2) OSStartHighRdy() MUST:
; a) Call OSTaskSwHook() then,
; b) Set OSRunning to TRUE,
; c) Switch to the highest priority task by loading the stack pointer of the
; highest priority task into the SP register and execute an RTI instruction.
;********************************************************************************************************
;********************************************************************************************************/
#pragma CODE_SEG NON_BANKED
#pragma TRAP_PROC
void near OSStartHighRdy(void) // Trap prodedures. look ucos_ii.h
{
#if OS_CPU_HOOKS_EN > 0
OSTaskSwHook(); /* 4~, Invoke user defined context switch hook */
#endif
__asm__ __volatile__ ("inc OSRunning");
asm volatile ("lds\t%0" : : "mi" (OSTCBHighRdy->OSTCBStkPtr)); // SP = OSTCBCur->OSTCBStkPtr
__asm__ __volatile__ ("rti");
}
/********************************************************************************************************
;********************************************************************************************************
; TASK LEVEL CONTEXT SWITCH
;
; Description : This function is called when a task makes a higher priority task ready-to-run.
;
; Arguments : none
;
; Note(s) : 1) Upon entry,
; OSTCBCur points to the OS_TCB of the task to suspend
; OSTCBHighRdy points to the OS_TCB of the task to resume
;
; 2) The stack frame of the task to suspend looks as follows:
;
; SP + 0 --> PPAGE
; + 1 CCR
; + 2 B
; + 3 A
; + 4 X (H)
; + 5 X (L)
; + 6 Y (H)
; + 7 Y (L)
; + 8 PC(H)
; + 9 PC(L)
;
; 3) The stack frame of the task to resume looks as follows:
;
; OSTCBHighRdy->OSTCBStkPtr + 0 --> PPAGE
; + 1 CCR
; + 2 B
; + 3 A
; + 4 X (H)
; + 5 X (L)
; + 6 Y (H)
; + 7 Y (L)
; + 8 PC(H)
; + 9 PC(L)
;********************************************************************************************************
;*********************************************************************************************************/
#pragma TRAP_PROC
#pragma CODE_SEG __NEAR_SEG NON_BANKED // add this code by Hansol Park. 2006.1.2
void OSCtxSw(void) // Interrupt Procedure. look ucos_ii.h
{
asm volatile ("sts\t%0" : "=m" (OSTCBCur->OSTCBStkPtr)); // OSTCBCur->OSTCBStkPtr = SP
#if OS_CPU_HOOKS_EN > 0
OSTaskSwHook(); // 4~, Invoke user defined context switch hook
#endif
OSTCBCur = OSTCBHighRdy;
OSPrioCur = OSPrioHighRdy;
asm volatile ("lds\t%0" : : "mi" (OSTCBHighRdy->OSTCBStkPtr));
__asm__ __volatile__ ("rti");
}
#pragma CODE_SEG DEFAULT
/********************************************************************************************************
;********************************************************************************************************
; INTERRUPT LEVEL CONTEXT SWITCH
;
; Description : This function is called by OSIntExit() to perform a context switch to a task that has
; been made ready-to-run by an ISR.
;
; Arguments : none
;********************************************************************************************************
;********************************************************************************************************/
#pragma TRAP_PROC
void near OSIntCtxSw(void)
{
#if OS_CPU_HOOKS_EN > 0
OSTaskSwHook(); /* 4~, Invoke user defined context switch hook */
#endif
OSTCBCur = OSTCBHighRdy;
OSPrioCur = OSPrioHighRdy;
asm volatile ("lds\t%0" : : "mi" (OSTCBHighRdy->OSTCBStkPtr)); //SP = OSTCBHighRdy->OSTCBStkPtr;
__asm__ __volatile__ ("rti"); // If stack is correct, this works with no problem.
}
/*********************************************************************************************************
;********************************************************************************************************
; SYSTEM TICK ISR
;
; Description : This function is the ISR used to notify uC/OS-II that a system tick has occurred. You
; must setup the 68HC12's interrupt vector table so that an OUTPUT COMPARE interrupt
; vectors to this function.
;
; Arguments : none
;
; Notes : 1) The 'tick ISR' assumes the we are using the Output Compare specified by OS_TICK_OC
; (see OS_CFG.H and this file) to generate a tick that occurs every OS_TICK_OC_CNTS
; (see OS_CFG.H and this file) which corresponds to the number of FRT (Free Running
; Timer) counts to the next interrupt.
;
; 2) You must specify which output compare will be used by the tick ISR as follows:
; Set OS_TICK_OC in OS_CFG.H (AND in this file) to 0 to use OUTPUT COMPARE #0
; Set OS_TICK_OC in OS_CFG.H (AND in this file) to 1 to use OUTPUT COMPARE #1
; Set OS_TICK_OC in OS_CFG.H (AND in this file) to 2 to use OUTPUT COMPARE #2
; Set OS_TICK_OC in OS_CFG.H (AND in this file) to 3 to use OUTPUT COMPARE #3
; Set OS_TICK_OC in OS_CFG.H (AND in this file) to 4 to use OUTPUT COMPARE #4
; Set OS_TICK_OC in OS_CFG.H (AND in this file) to 5 to use OUTPUT COMPARE #5
; Set OS_TICK_OC in OS_CFG.H (AND in this file) to 6 to use OUTPUT COMPARE #6
; Set OS_TICK_OC in OS_CFG.H (AND in this file) to 7 to use OUTPUT COMPARE #7
;
; 3) TFLG1, TC0 ... TC7 are defined in 6812dp256.h.
;********************************************************************************************************
;********************************************************************************************************/
#pragma TRAP_PROC
#pragma CODE_SEG __NEAR_SEG NON_BANKED // add this code by Hansol Park. 2006.1.2
void OSTickISR(void) // modify this code by Hansol Park. 2006.1.2
{
__asm__ __volatile__ ("inc OSIntNesting");
if (OSIntNesting == 1){ // 4~, if (OSIntNesting == 1) {
asm volatile ("sts\t%0" : "=m" (OSTCBCur->OSTCBStkPtr)); // OSTCBCur->OSTCBStkPtr = SP
}
#if OS_TICK_OC == 0
__asm__ __volatile__ ("ldab #0x01");
__asm__ __volatile__ ("stab TFLG1");
__asm__ __volatile__ ("ldd TC0");
__asm__ __volatile__ ("addd #OS_TICK_OC_CNTS");
__asm__ __volatile__ ("std TC0");
#endif
#if OS_TICK_OC == 1
__asm__ __volatile__ ("ldab #0x02");
__asm__ __volatile__ ("stab TFLG1");
__asm__ __volatile__ ("ldd TC1");
__asm__ __volatile__ ("addd #OS_TICK_OC_CNTS");
__asm__ __volatile__ ("std TC1");
#endif
#if OS_TICK_OC == 2
__asm__ __volatile__ ("ldab #0x04");
__asm__ __volatile__ ("stab TFLG1");
__asm__ __volatile__ ("ldd TC2");
__asm__ __volatile__ ("addd #OS_TICK_OC_CNTS");
__asm__ __volatile__ ("std TC2");
#endif
#if OS_TICK_OC == 3
__asm__ __volatile__ ("ldab #0x08");
__asm__ __volatile__ ("stab TFLG1");
__asm__ __volatile__ ("ldd TC3");
__asm__ __volatile__ ("addd #OS_TICK_OC_CNTS");
__asm__ __volatile__ ("std TC3");
#endif
#if OS_TICK_OC == 4
__asm__ __volatile__ ("ldab #0x10");
__asm__ __volatile__ ("stab TFLG1");
__asm__ __volatile__ ("ldd TC4");
__asm__ __volatile__ ("addd #OS_TICK_OC_CNTS");
__asm__ __volatile__ ("std TC4");
#endif
#if OS_TICK_OC == 5
__asm__ __volatile__ ("ldab #0x20");
__asm__ __volatile__ ("stab TFLG1");
__asm__ __volatile__ ("ldd TC5");
__asm__ __volatile__ ("addd #OS_TICK_OC_CNTS");
__asm__ __volatile__ ("std TC5");
#endif
#if OS_TICK_OC == 6
__asm__ __volatile__ ("ldab #0x40");
__asm__ __volatile__ ("stab TFLG1");
__asm__ __volatile__ ("ldd TC6");
__asm__ __volatile__ ("addd #OS_TICK_OC_CNTS");
__asm__ __volatile__ ("std TC6");
#endif
#if OS_TICK_OC == 7
__asm__ __volatile__ ("ldab #0x80");
__asm__ __volatile__ ("stab TFLG1");
__asm__ __volatile__ ("ldd TC7");
__asm__ __volatile__ ("addd #OS_TICK_OC_CNTS");
__asm__ __volatile__ ("std TC7");
#endif
__asm__ __volatile__ ("cli"); // enable interrupt
OSTimeTick(); /* 6~+, Call uC/OS-II's tick updating function */
OSIntExit (); /* 6~+, Notify uC/OS-II about end of ISR */
__asm__ __volatile__ ("rti");
}
#pragma CODE_SEG DEFAULT
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