📄 cpu.c
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/** ###################################################################
** THIS BEAN MODULE IS GENERATED BY THE TOOL. DO NOT MODIFY IT.
** Filename : Cpu.C
** Project : _2006_01_02_PE
** Processor : MC9S12H256CPV
** Beantype : MC9S12H256_112
** Version : Bean 01.009, Driver 01.19, CPU db: 2.87.329
** Datasheet : 9S12H256BDGV1/D V01.16
** Compiler : Metrowerks HC12 C Compiler
** Date/Time : 1/3/2006, 3:59 PM
** Abstract :
** This bean "MC9S12H256_112" implements properties, methods,
** and events of the CPU.
** Settings :
**
** Contents :
** EnableInt - void Cpu_EnableInt(void);
** DisableInt - void Cpu_DisableInt(void);
** SetWaitMode - void Cpu_SetWaitMode(void);
** SetStopMode - void Cpu_SetStopMode(void);
**
** (c) Copyright UNIS, spol. s r.o. 1997-2004
** UNIS, spol. s r.o.
** Jundrovska 33
** 624 00 Brno
** Czech Republic
** http : www.processorexpert.com
** mail : info@processorexpert.com
** ###################################################################*/
/* MODULE Cpu. */
#include "Cpu.h"
#define CGM_DELAY 1023UL
#pragma DATA_SEG DEFAULT
/* Global variables */
volatile byte CCR_reg; /* Current CCR reegister */
byte CpuMode = HIGH_SPEED; /* Current speed mode */
/*
** ===================================================================
** Method : Cpu_Interrupt (bean MC9S12H256_112)
**
** Description :
** This method is internal. It is used by Processor Expert
** only.
** ===================================================================
*/
#pragma CODE_SEG __NEAR_SEG NON_BANKED
ISR(Cpu_Interrupt)
{
}
/*
** ===================================================================
** Method : Cpu_SWINT (bean MC9S12H256_144)
**
** Description :
** This method is internal. It is used by Processor Expert
** only.
** ===================================================================
*/
ISR(Cpu_SWINT)
{
OSCtxSw(); /* invoke an user interrupt */
}
#pragma CODE_SEG DEFAULT
/*
** ===================================================================
** Method : Cpu_DisableInt (bean MC9S12H256_112)
**
** Description :
** Disable maskable interrupts
** Parameters : None
** Returns : Nothing
** ===================================================================
*/
/*
void Cpu_DisableInt(void)
** This method is implemented as macro in the header module. **
*/
/*
** ===================================================================
** Method : Cpu_EnableInt (bean MC9S12H256_112)
**
** Description :
** Enable maskable interrupts
** Parameters : None
** Returns : Nothing
** ===================================================================
*/
/*
void Cpu_EnableInt(void)
** This method is implemented as macro in the header module. **
*/
/*
** ===================================================================
** Method : Cpu_SetStopMode (bean MC9S12H256_112)
**
** Description :
** Set low power mode - Stop mode.
** For more information about the stop mode see
** documentation of this CPU.
** Parameters : None
** Returns : Nothing
** ===================================================================
*/
/*
void Cpu_SetStopMode(void)
** This method is implemented as macro in the header module. **
*/
/*
** ===================================================================
** Method : Cpu_SetWaitMode (bean MC9S12H256_112)
**
** Description :
** Set low power mode - Wait mode.
** For more information about the wait mode see
** documentation of this CPU.
** Release from Wait mode: Reset or interrupt
** Parameters : None
** Returns : Nothing
** ===================================================================
*/
/*
void Cpu_SetWaitMode(void)
** This method is implemented as macro in the header module. **
*/
/*
** ===================================================================
** Method : _EntryPoint (bean MC9S12H256_112)
**
** Description :
** This method is internal. It is used by Processor Expert
** only.
** ===================================================================
*/
extern void _Startup(void); /* Forward declaration of external startup function declared in file Start12.c */
#pragma CODE_SEG __NEAR_SEG NON_BANKED
#define INITRG_ADR 0x0011 /* Register map position register */
#pragma NO_FRAME
#pragma NO_EXIT
void _EntryPoint(void)
{
/*** ### MC9S12H256CPV "Cpu" init code ... ***/
/*** PE initialization code after reset ***/
/* Initialization of the registers INITRG, INITRM, INITEE is done to protect them to be written accidentally later by the application */
*(byte*)INITRG_ADR = 0; /* Set the register map position */
asm("nop"); /* nop instruction */
INITRM=1; /* Set the RAM map position */
INITEE=1; /* Set the EEPROM map position */
/* MISC: ??=0,??=0,??=0,??=0,EXSTR1=1,EXSTR0=1,ROMHM=0,ROMON=1 */
MISC=13;
/* PEAR: NOACCE=0,??=0,PIPOE=0,NECLK=1,LSTRE=0,RDWE=0,??=0,??=0 */
PEAR=16;
CLKSEL = 0; /* Select clock source from XTAL and set bits in CLKSEL reg. */
/*** End of PE initialization code after reset ***/
__asm("jmp _Startup"); /* Jump to C startup code */
}
#pragma CODE_SEG DEFAULT
/*
** ===================================================================
** Method : PE_low_level_init (bean MC9S12H256_112)
**
** Description :
** This method is internal. It is used by Processor Expert
** only.
** ===================================================================
*/
void PE_low_level_init(void)
{
/* Common initialization of the CPU registers */
/* PWMCTL: PSWAI=0,PFRZ=0 */
clrReg8Bits(PWMCTL, 12);
/* TSCR1: TSWAI=0,TSFRZ=0 */
clrReg8Bits(TSCR1, 96);
/* ### MC9S12H256_112 "Cpu" init code ... */
INTCR_IRQEN = 0; /* Disable the IRQ interrupt. IRQ interrupt is enabled after CPU reset by default. */
__EI(); /* Enable interrupts */
}
/* END Cpu. */
/*
** ###################################################################
**
** This file was created by UNIS Processor Expert 2.95 [03.62]
** for the Freescale HCS12 series of microcontrollers.
**
** ###################################################################
*/
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