smdk2410.c

ARMboot is a firmware monitor/bootloader for embedded systems based on ARM or StrongARM CPUs

/*
 * (C) Copyright 2002
 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
 * Marius Groeger <[e-mail]>
 *
 * (C) Copyright 2002
 * David Mueller, ELSOFT AG, <[e-mail]>
 *
 * See file CREDITS for list of people who contributed to this
 * project.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 */

#include "armboot.h"
#include "s3c2410.h"

/* ------------------------------------------------------------------------- */

#define FCLK_SPEED 1

#if FCLK_SPEED==0	/* Fout = 203MHz, Fin = 12MHz for Audio */
    #define M_MDIV	0xC3
    #define M_PDIV	0x4
    #define M_SDIV	0x1
#elif FCLK_SPEED==1	/* Fout = 202.8MHz */
    #define M_MDIV	0xA1
    #define M_PDIV	0x3
    #define M_SDIV	0x1
#endif

#define USB_CLOCK 1

#if USB_CLOCK==0
    #define U_M_MDIV	0xA1
    #define U_M_PDIV	0x3
    #define U_M_SDIV	0x1
#elif USB_CLOCK==1
    #define U_M_MDIV	0x48
    #define U_M_PDIV	0x3
    #define U_M_SDIV	0x2
#endif

static inline
void delay(unsigned long loops)
{
    __asm__ volatile (
	"1:\n"
	"subs %0, %1, #1\n"
	"bne 1b"
	 : "=r" (loops) : "0" (loops));
}

/*
 * Miscellaneous platform dependent initialisations
 */

int board_init(bd_t *bd)
{
    /* to reduce PLL lock time, adjust the LOCKTIME register */
    rLOCKTIME = 0xFFFFFF;

    /* configure MPLL */
    rMPLLCON = ((M_MDIV << 12) + (M_PDIV << 4) + M_SDIV);

    /* some delay between MPLL and UPLL */
    delay(4000);

    /* configure UPLL */
    rUPLLCON = ((U_M_MDIV << 12) + (U_M_PDIV << 4) + U_M_SDIV);

    /* some delay between MPLL and UPLL */
    delay(8000);

    /* set up the I/O ports */
    rGPACON = 0x007FFFFF;
    rGPBCON = 0x00044555;
    rGPBUP  = 0x000007FF;
    rGPCCON = 0xAAAAAAAA;
    rGPCUP  = 0x0000FFFF;
    rGPDCON = 0xAAAAAAAA;
    rGPDUP  = 0x0000FFFF;
    rGPECON = 0xAAAAAAAA;
    rGPEUP  = 0x0000FFFF;
    rGPFCON = 0x000055AA;
    rGPFUP  = 0x000000FF;
    rGPGCON = 0xFF95FFBA;
    rGPGUP  = 0x0000FFFF;
    rGPHCON = 0x002AFAAA;
    rGPHUP  = 0x000007FF;

    /* arch number of SMDK2410-Board */
    bd->bi_arch_number = 193;

    /* adress of boot parameters */
    bd->bi_boot_params = 0x30000100;

    return 1;
}

int dram_init(bd_t *bd)
{
    bd->bi_dram[0].start = PHYS_SDRAM_1;
    bd->bi_dram[0].size  = PHYS_SDRAM_1_SIZE;
    return PHYS_SDRAM_1_SIZE;
}