s3c2400.h

ARMboot is a firmware monitor/bootloader for embedded systems based on ARM or StrongARM CPUs

#define rIICCON		(*(volatile unsigned *)0x15400000)
#define rIICSTAT	(*(volatile unsigned *)0x15400004)
#define rIICADD		(*(volatile unsigned *)0x15400008)
#define rIICDS		(*(volatile unsigned *)0x1540000C)


/* IIS */
#define rIISCON		(*(volatile unsigned *)0x15508000)
#define rIISMOD		(*(volatile unsigned *)0x15508004)
#define rIISPSR		(*(volatile unsigned *)0x15508008)
#define rIISFIFCON	(*(volatile unsigned *)0x1550800C)

#ifdef __BIG_ENDIAN
#define IISFIF		((volatile unsigned short *)0x15508012)

#else /* Little Endian */
#define IISFIF		((volatile unsigned short *)0x15508010)
#endif


/* I/O PORT */
#define rPACON		(*(volatile unsigned *)0x15600000)
#define rPADAT		(*(volatile unsigned *)0x15600004)

#define rPBCON		(*(volatile unsigned *)0x15600008)
#define rPBDAT		(*(volatile unsigned *)0x1560000C)
#define rPBUP		(*(volatile unsigned *)0x15600010)

#define rPCCON		(*(volatile unsigned *)0x15600014)
#define rPCDAT		(*(volatile unsigned *)0x15600018)
#define rPCUP		(*(volatile unsigned *)0x1560001C)

#define rPDCON		(*(volatile unsigned *)0x15600020)
#define rPDDAT		(*(volatile unsigned *)0x15600024)
#define rPDUP		(*(volatile unsigned *)0x15600028)

#define rPECON		(*(volatile unsigned *)0x1560002C)
#define rPEDAT		(*(volatile unsigned *)0x15600030)
#define rPEUP		(*(volatile unsigned *)0x15600034)

#define rPFCON		(*(volatile unsigned *)0x15600038)
#define rPFDAT		(*(volatile unsigned *)0x1560003C)
#define rPFUP		(*(volatile unsigned *)0x15600040)

#define rPGCON		(*(volatile unsigned *)0x15600044)
#define rPGDAT		(*(volatile unsigned *)0x15600048)
#define rPGUP		(*(volatile unsigned *)0x1560004C)

#define rOPENCR		(*(volatile unsigned *)0x15600050)
#define rMISCCR		(*(volatile unsigned *)0x15600054)
#define rEXTINT		(*(volatile unsigned *)0x15600058)


/* RTC */
#ifdef __BIG_ENDIAN
#define rRTCCON		(*(volatile unsigned char *)0x15700043)
#define rRTCALM		(*(volatile unsigned char *)0x15700053)
#define rALMSEC		(*(volatile unsigned char *)0x15700057)
#define rALMMIN		(*(volatile unsigned char *)0x1570005B)
#define rALMHOUR	(*(volatile unsigned char *)0x1570005F)
#define rALMDAY		(*(volatile unsigned char *)0x15700063)
#define rALMMON		(*(volatile unsigned char *)0x15700067)
#define rALMYEAR	(*(volatile unsigned char *)0x1570006B)
#define rRTCRST		(*(volatile unsigned char *)0x1570006F)
#define rBCDSEC		(*(volatile unsigned char *)0x15700073)
#define rBCDMIN		(*(volatile unsigned char *)0x15700077)
#define rBCDHOUR	(*(volatile unsigned char *)0x1570007B)
#define rBCDDAY		(*(volatile unsigned char *)0x1570007F)
#define rBCDDATE	(*(volatile unsigned char *)0x15700083)
#define rBCDMON		(*(volatile unsigned char *)0x15700087)
#define rBCDYEAR	(*(volatile unsigned char *)0x1570008B)
#define rTICINT		(*(volatile unsigned char *)0x15700047)

#else /* Little Endian */
#define rRTCCON		(*(volatile unsigned char *)0x15700040)
#define rRTCALM		(*(volatile unsigned char *)0x15700050)
#define rALMSEC		(*(volatile unsigned char *)0x15700054)
#define rALMMIN		(*(volatile unsigned char *)0x15700058)
#define rALMHOUR	(*(volatile unsigned char *)0x1570005C)
#define rALMDAY		(*(volatile unsigned char *)0x15700060)
#define rALMMON		(*(volatile unsigned char *)0x15700064)
#define rALMYEAR	(*(volatile unsigned char *)0x15700068)
#define rRTCRST		(*(volatile unsigned char *)0x1570006C)
#define rBCDSEC		(*(volatile unsigned char *)0x15700070)
#define rBCDMIN		(*(volatile unsigned char *)0x15700074)
#define rBCDHOUR	(*(volatile unsigned char *)0x15700078)
#define rBCDDAY		(*(volatile unsigned char *)0x1570007C)
#define rBCDDATE	(*(volatile unsigned char *)0x15700080)
#define rBCDMON		(*(volatile unsigned char *)0x15700084)
#define rBCDYEAR	(*(volatile unsigned char *)0x15700088)
#define rTICINT		(*(volatile unsigned char *)0x15700044)
#endif


/* ADC */
#define rADCCON		(*(volatile unsigned *)0x15800000)
#define rADCDAT		(*(volatile unsigned *)0x15800004)


/* SPI */
#define rSPCON		(*(volatile unsigned *)0x15900000)
#define rSPSTA		(*(volatile unsigned *)0x15900004)
#define rSPPIN		(*(volatile unsigned *)0x15900008)
#define rSPPRE		(*(volatile unsigned *)0x1590000C)
#define rSPTDAT		(*(volatile unsigned *)0x15900010)
#define rSPRDAT		(*(volatile unsigned *)0x15900014)


/* MMC INTERFACE */
#define rMMCON		(*(volatile unsigned *)0x15a00000)
#define rMMCRR		(*(volatile unsigned *)0x15a00004)
#define rMMFCON		(*(volatile unsigned *)0x15a00008)
#define rMMSTA		(*(volatile unsigned *)0x15a0000C)
#define rMMFSTA		(*(volatile unsigned *)0x15a00010)
#define rMMPRE		(*(volatile unsigned *)0x15a00014)
#define rMMLEN		(*(volatile unsigned *)0x15a00018)
#define rMMCR7		(*(volatile unsigned *)0x15a0001C)
#define rMMRSP0		(*(volatile unsigned *)0x15a00020)
#define rMMRSP1		(*(volatile unsigned *)0x15a00024)
#define rMMRSP2		(*(volatile unsigned *)0x15a00028)
#define rMMRSP3		(*(volatile unsigned *)0x15a0002C)
#define rMMCMD0		(*(volatile unsigned *)0x15a00030)
#define rMMCMD1		(*(volatile unsigned *)0x15a00034)
#define rMMCR16		(*(volatile unsigned *)0x15a00038)
#define rMMDAT		(*(volatile unsigned *)0x15a0003C)



/* ISR */
#define pISR_RESET	(*(unsigned *)(_ISR_STARTADDRESS+0x0))
#define pISR_UNDEF	(*(unsigned *)(_ISR_STARTADDRESS+0x4))
#define pISR_SWI	(*(unsigned *)(_ISR_STARTADDRESS+0x8))
#define pISR_PABORT	(*(unsigned *)(_ISR_STARTADDRESS+0xC))
#define pISR_DABORT	(*(unsigned *)(_ISR_STARTADDRESS+0x10))
#define pISR_RESERVED	(*(unsigned *)(_ISR_STARTADDRESS+0x14))
#define pISR_IRQ	(*(unsigned *)(_ISR_STARTADDRESS+0x18))
#define pISR_FIQ	(*(unsigned *)(_ISR_STARTADDRESS+0x1C))

#define pISR_EINT0	(*(unsigned *)(_ISR_STARTADDRESS+0x20))
#define pISR_EINT1	(*(unsigned *)(_ISR_STARTADDRESS+0x24))
#define pISR_EINT2	(*(unsigned *)(_ISR_STARTADDRESS+0x28))
#define pISR_EINT3	(*(unsigned *)(_ISR_STARTADDRESS+0x2C))
#define pISR_EINT4	(*(unsigned *)(_ISR_STARTADDRESS+0x30))
#define pISR_EINT5	(*(unsigned *)(_ISR_STARTADDRESS+0x34))
#define pISR_EINT6	(*(unsigned *)(_ISR_STARTADDRESS+0x38))
#define pISR_EINT7	(*(unsigned *)(_ISR_STARTADDRESS+0x3C))
#define pISR_TICK	(*(unsigned *)(_ISR_STARTADDRESS+0x40))
#define pISR_WDT	(*(unsigned *)(_ISR_STARTADDRESS+0x44))
#define pISR_TIMER0	(*(unsigned *)(_ISR_STARTADDRESS+0x48))
#define pISR_TIMER1	(*(unsigned *)(_ISR_STARTADDRESS+0x4C))
#define pISR_TIMER2	(*(unsigned *)(_ISR_STARTADDRESS+0x50))
#define pISR_TIMER3	(*(unsigned *)(_ISR_STARTADDRESS+0x54))
#define pISR_TIMER4	(*(unsigned *)(_ISR_STARTADDRESS+0x58))
#define pISR_UERR01	(*(unsigned *)(_ISR_STARTADDRESS+0x5C))
#define pISR_NOTUSED	(*(unsigned *)(_ISR_STARTADDRESS+0x60))
#define pISR_DMA0	(*(unsigned *)(_ISR_STARTADDRESS+0x64))
#define pISR_DMA1	(*(unsigned *)(_ISR_STARTADDRESS+0x68))
#define pISR_DMA2	(*(unsigned *)(_ISR_STARTADDRESS+0x6C))
#define pISR_DMA3	(*(unsigned *)(_ISR_STARTADDRESS+0x70))
#define pISR_MMC	(*(unsigned *)(_ISR_STARTADDRESS+0x74))
#define pISR_SPI	(*(unsigned *)(_ISR_STARTADDRESS+0x78))
#define pISR_URXD0	(*(unsigned *)(_ISR_STARTADDRESS+0x7C))
#define pISR_URXD1	(*(unsigned *)(_ISR_STARTADDRESS+0x80))
#define pISR_USBD	(*(unsigned *)(_ISR_STARTADDRESS+0x84))
#define pISR_USBH	(*(unsigned *)(_ISR_STARTADDRESS+0x88))
#define pISR_IIC	(*(unsigned *)(_ISR_STARTADDRESS+0x8C))
#define pISR_UTXD0	(*(unsigned *)(_ISR_STARTADDRESS+0x90))
#define pISR_UTXD1	(*(unsigned *)(_ISR_STARTADDRESS+0x94))
#define pISR_RTC	(*(unsigned *)(_ISR_STARTADDRESS+0x98))
#define pISR_ADC	(*(unsigned *)(_ISR_STARTADDRESS+0xA0))


/* PENDING BIT */
#define BIT_EINT0	(0x1)
#define BIT_EINT1	(0x1<<1)
#define BIT_EINT2	(0x1<<2)
#define BIT_EINT3	(0x1<<3)
#define BIT_EINT4	(0x1<<4)
#define BIT_EINT5	(0x1<<5)
#define BIT_EINT6	(0x1<<6)
#define BIT_EINT7	(0x1<<7)
#define BIT_TICK	(0x1<<8)
#define BIT_WDT		(0x1<<9)
#define BIT_TIMER0	(0x1<<10)
#define BIT_TIMER1	(0x1<<11)
#define BIT_TIMER2	(0x1<<12)
#define BIT_TIMER3	(0x1<<13)
#define BIT_TIMER4	(0x1<<14)
#define BIT_UERR01	(0x1<<15)
#define BIT_NOTUSED	(0x1<<16)
#define BIT_DMA0	(0x1<<17)
#define BIT_DMA1	(0x1<<18)
#define BIT_DMA2	(0x1<<19)
#define BIT_DMA3	(0x1<<20)
#define BIT_MMC		(0x1<<21)
#define BIT_SPI		(0x1<<22)
#define BIT_URXD0	(0x1<<23)
#define BIT_URXD1	(0x1<<24)
#define BIT_USBD	(0x1<<25)
#define BIT_USBH	(0x1<<26)
#define BIT_IIC		(0x1<<27)
#define BIT_UTXD0	(0x1<<28)
#define BIT_UTXD1	(0x1<<29)
#define BIT_RTC		(0x1<<30)
#define BIT_ADC		(0x1<<31)
#define BIT_ALLMSK	(0xFFFFFFFF)

#define ClearPending(bit) {\
		 rSRCPND = bit;\
		 rINTPND = bit;\
		 rINTPND;\
		 }
/* Wait until rINTPND is changed for the case that the ISR is very short. */
#endif /*__S3C2400_H__*/