s3c2400.h

ARMboot is a firmware monitor/bootloader for embedded systems based on ARM or StrongARM CPUs

/************************************************
 * NAME	    : s3c2400.h
 * Version  : 3.7.2002
 *
 * Based on 24x.h for the Samsung Development Board
 ************************************************/

#ifndef __S3C2400_H__
#define __S3C2400_H__

/* Memory control */
#define rBWSCON		(*(volatile unsigned *)0x14000000)
#define rBANKCON0	(*(volatile unsigned *)0x14000004)
#define rBANKCON1	(*(volatile unsigned *)0x14000008)
#define rBANKCON2	(*(volatile unsigned *)0x1400000C)
#define rBANKCON3	(*(volatile unsigned *)0x14000010)
#define rBANKCON4	(*(volatile unsigned *)0x14000014)
#define rBANKCON5	(*(volatile unsigned *)0x14000018)
#define rBANKCON6	(*(volatile unsigned *)0x1400001C)
#define rBANKCON7	(*(volatile unsigned *)0x14000020)
#define rREFRESH	(*(volatile unsigned *)0x14000024)
#define rBANKSIZE	(*(volatile unsigned *)0x14000028)
#define rMRSRB6		(*(volatile unsigned *)0x1400002C)
#define rMRSRB7		(*(volatile unsigned *)0x14000030)


/* INTERRUPT */
#define rSRCPND		(*(volatile unsigned *)0x14400000)
#define rINTMOD		(*(volatile unsigned *)0x14400004)
#define rINTMSK		(*(volatile unsigned *)0x14400008)
#define rPRIORITY	(*(volatile unsigned *)0x1440000C)
#define rINTPND		(*(volatile unsigned *)0x14400010)
#define rINTOFFSET	(*(volatile unsigned *)0x14400014)


/* DMA */
#define rDISRC0		(*(volatile unsigned *)0x14600000)
#define rDIDST0		(*(volatile unsigned *)0x14600004)
#define rDCON0		(*(volatile unsigned *)0x14600008)
#define rDSTAT0		(*(volatile unsigned *)0x1460000C)
#define rDCSRC0		(*(volatile unsigned *)0x14600010)
#define rDCDST0		(*(volatile unsigned *)0x14600014)
#define rDMASKTRIG0	(*(volatile unsigned *)0x14600018)
#define rDISRC1		(*(volatile unsigned *)0x14600020)
#define rDIDST1		(*(volatile unsigned *)0x14600024)
#define rDCON1		(*(volatile unsigned *)0x14600028)
#define rDSTAT1		(*(volatile unsigned *)0x1460002C)
#define rDCSRC1		(*(volatile unsigned *)0x14600030)
#define rDCDST1		(*(volatile unsigned *)0x14600034)
#define rDMASKTRIG1	(*(volatile unsigned *)0x14600038)
#define rDISRC2		(*(volatile unsigned *)0x14600040)
#define rDIDST2		(*(volatile unsigned *)0x14600044)
#define rDCON2		(*(volatile unsigned *)0x14600048)
#define rDSTAT2		(*(volatile unsigned *)0x1460004C)
#define rDCSRC2		(*(volatile unsigned *)0x14600050)
#define rDCDST2		(*(volatile unsigned *)0x14600054)
#define rDMASKTRIG2	(*(volatile unsigned *)0x14600058)
#define rDISRC3		(*(volatile unsigned *)0x14600060)
#define rDIDST3		(*(volatile unsigned *)0x14600064)
#define rDCON3		(*(volatile unsigned *)0x14600068)
#define rDSTAT3		(*(volatile unsigned *)0x1460006C)
#define rDCSRC3		(*(volatile unsigned *)0x14600070)
#define rDCDST3		(*(volatile unsigned *)0x14600074)
#define rDMASKTRIG3	(*(volatile unsigned *)0x14600078)


/* CLOCK & POWER MANAGEMENT */
#define rLOCKTIME	(*(volatile unsigned *)0x14800000)
#define rMPLLCON	(*(volatile unsigned *)0x14800004)
#define rUPLLCON	(*(volatile unsigned *)0x14800008)
#define rCLKCON		(*(volatile unsigned *)0x1480000C)
#define rCLKSLOW	(*(volatile unsigned *)0x14800010)
#define rCLKDIVN	(*(volatile unsigned *)0x14800014)


/* LCD CONTROLLER */
#define rLCDCON1	(*(volatile unsigned *)0x14A00000)
#define rLCDCON2	(*(volatile unsigned *)0x14A00004)
#define rLCDCON3	(*(volatile unsigned *)0x14A00008)
#define rLCDCON4	(*(volatile unsigned *)0x14A0000C)
#define rLCDCON5	(*(volatile unsigned *)0x14A00010)
#define rLCDSADDR1	(*(volatile unsigned *)0x14A00014)
#define rLCDSADDR2	(*(volatile unsigned *)0x14A00018)
#define rLCDSADDR3	(*(volatile unsigned *)0x14A0001C)
#define rREDLUT		(*(volatile unsigned *)0x14A00020)
#define rGREENLUT	(*(volatile unsigned *)0x14A00024)
#define rBLUELUT	(*(volatile unsigned *)0x14A00028)
#define rDP1_2		(*(volatile unsigned *)0x14A0002C)
#define rDP4_7		(*(volatile unsigned *)0x14A00030)
#define rDP3_5		(*(volatile unsigned *)0x14A00034)
#define rDP2_3		(*(volatile unsigned *)0x14A00038)
#define rDP5_7		(*(volatile unsigned *)0x14A0003c)
#define rDP3_4		(*(volatile unsigned *)0x14A00040)
#define rDP4_5		(*(volatile unsigned *)0x14A00044)
#define rDP6_7		(*(volatile unsigned *)0x14A00048)
#define rDITHMODE	(*(volatile unsigned *)0x14A0004C)
#define rTPAL		(*(volatile unsigned *)0x14A00050)
#define PALETTE		(0x14A00400)	/* SJS */


/* UART */
#define rULCON0		(*(volatile unsigned char *)0x15000000)
#define rUCON0		(*(volatile unsigned short *)0x15000004)
#define rUFCON0		(*(volatile unsigned char *)0x15000008)
#define rUMCON0		(*(volatile unsigned char *)0x1500000C)
#define rUTRSTAT0	(*(volatile unsigned char *)0x15000010)
#define rUERSTAT0	(*(volatile unsigned char *)0x15000014)
#define rUFSTAT0	(*(volatile unsigned short *)0x15000018)
#define rUMSTAT0	(*(volatile unsigned char *)0x1500001C)
#define rUBRDIV0	(*(volatile unsigned short *)0x15000028)

#define rULCON1		(*(volatile unsigned char *)0x15004000)
#define rUCON1		(*(volatile unsigned short *)0x15004004)
#define rUFCON1		(*(volatile unsigned char *)0x15004008)
#define rUMCON1		(*(volatile unsigned char *)0x1500400C)
#define rUTRSTAT1	(*(volatile unsigned char *)0x15004010)
#define rUERSTAT1	(*(volatile unsigned char *)0x15004014)
#define rUFSTAT1	(*(volatile unsigned short *)0x15004018)
#define rUMSTAT1	(*(volatile unsigned char *)0x1500401C)
#define rUBRDIV1	(*(volatile unsigned short *)0x15004028)

#ifdef __BIG_ENDIAN
#define rUTXH0		(*(volatile unsigned char *)0x15000023)
#define rURXH0		(*(volatile unsigned char *)0x15000027)
#define rUTXH1		(*(volatile unsigned char *)0x15004023)
#define rURXH1		(*(volatile unsigned char *)0x15004027)

#define WrUTXH0(ch)	(*(volatile unsigned char *)0x15000023)=(unsigned char)(ch)
#define RdURXH0()	(*(volatile unsigned char *)0x15000027)
#define WrUTXH1(ch)	(*(volatile unsigned char *)0x15004023)=(unsigned char)(ch)
#define RdURXH1()	(*(volatile unsigned char *)0x15004027)

#define UTXH0		(0x15000020+3)  /* byte_access address by DMA */
#define URXH0		(0x15000024+3)
#define UTXH1		(0x15004020+3)
#define URXH1		(0x15004024+3)

#else /* Little Endian */
#define rUTXH0		(*(volatile unsigned char *)0x15000020)
#define rURXH0		(*(volatile unsigned char *)0x15000024)
#define rUTXH1		(*(volatile unsigned char *)0x15004020)
#define rURXH1		(*(volatile unsigned char *)0x15004024)

#define WrUTXH0(ch)	(*(volatile unsigned char *)0x15000020)=(unsigned char)(ch)
#define RdURXH0()	(*(volatile unsigned char *)0x15000024)
#define WrUTXH1(ch)	(*(volatile unsigned char *)0x15004020)=(unsigned char)(ch)
#define RdURXH1()	(*(volatile unsigned char *)0x15004024)

#define UTXH0		(0x15000020)    /* byte_access address by DMA */
#define URXH0		(0x15000024)
#define UTXH1		(0x15004020)
#define URXH1		(0x15004024)
#endif


/* PWM TIMER */
#define rTCFG0		(*(volatile unsigned *)0x15100000)
#define rTCFG1		(*(volatile unsigned *)0x15100004)
#define rTCON		(*(volatile unsigned *)0x15100008)
#define rTCNTB0		(*(volatile unsigned *)0x1510000C)
#define rTCMPB0		(*(volatile unsigned *)0x15100010)
#define rTCNTO0		(*(volatile unsigned *)0x15100014)
#define rTCNTB1		(*(volatile unsigned *)0x15100018)
#define rTCMPB1		(*(volatile unsigned *)0x1510001C)
#define rTCNTO1		(*(volatile unsigned *)0x15100020)
#define rTCNTB2		(*(volatile unsigned *)0x15100024)
#define rTCMPB2		(*(volatile unsigned *)0x15100028)
#define rTCNTO2		(*(volatile unsigned *)0x1510002C)
#define rTCNTB3		(*(volatile unsigned *)0x15100030)
#define rTCMPB3		(*(volatile unsigned *)0x15100034)
#define rTCNTO3		(*(volatile unsigned *)0x15100038)
#define rTCNTB4		(*(volatile unsigned *)0x1510003C)
#define rTCNTO4		(*(volatile unsigned *)0x15100040)


/* USB DEVICE */
#define rFUNC_ADDR_REG	(*(volatile unsigned *)0x15200140)
#define rPWR_REG	(*(volatile unsigned *)0x15200144)
#define rINT_REG	(*(volatile unsigned *)0x15200148)
#define rINT_MASK_REG	(*(volatile unsigned *)0x1520014C)
#define rFRAME_NUM_REG	(*(volatile unsigned *)0x15200150)
#define rRESUME_CON_REG	(*(volatile unsigned *)0x15200154)
#define rEP0_CSR	(*(volatile unsigned *)0x15200160)
#define rEP0_MAXP	(*(volatile unsigned *)0x15200164)
#define rEP0_OUT_CNT	(*(volatile unsigned *)0x15200168)
#define rEP0_FIFO	(*(volatile unsigned *)0x1520016C)
#define rEP1_IN_CSR	(*(volatile unsigned *)0x15200180)
#define rEP1_IN_MAXP	(*(volatile unsigned *)0x15200184)
#define rEP1_FIFO	(*(volatile unsigned *)0x15200188)
#define rEP2_IN_CSR	(*(volatile unsigned *)0x15200190)
#define rEP2_IN_MAXP	(*(volatile unsigned *)0x15200194)
#define rEP2_FIFO	(*(volatile unsigned *)0x15200198)
#define rEP3_OUT_CSR	(*(volatile unsigned *)0x152001A0)
#define rEP3_OUT_MAXP	(*(volatile unsigned *)0x152001A4)
#define rEP3_OUT_CNT	(*(volatile unsigned *)0x152001A8)
#define rEP3_FIFO	(*(volatile unsigned *)0x152001AC)
#define rEP4_OUT_CSR	(*(volatile unsigned *)0x152001B0)
#define rEP4_OUT_MAXP	(*(volatile unsigned *)0x152001B4)
#define rEP4_OUT_CNT	(*(volatile unsigned *)0x152001B8)
#define rEP4_FIFO	(*(volatile unsigned *)0x152001BC)
#define rDMA_CON	(*(volatile unsigned *)0x152001C0)
#define rDMA_UNIT	(*(volatile unsigned *)0x152001C4)
#define rDMA_FIFO	(*(volatile unsigned *)0x152001C8)
#define rDMA_TX		(*(volatile unsigned *)0x152001CC)
#define rTEST_MODE	(*(volatile unsigned *)0x152001F4)
#define rIN_CON_REG	(*(volatile unsigned *)0x152001F8)


/* WATCH DOG TIMER */
#define rWTCON		(*(volatile unsigned *)0x15300000)
#define rWTDAT		(*(volatile unsigned *)0x15300004)
#define rWTCNT		(*(volatile unsigned *)0x15300008)


/* IIC */