📄 c5402mmr.h
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#define DMDSTP_BASEA 0x56
#define DMIDX0_BASEA 0x56
#define DMIDX1_BASEA 0x56
#define DMFRI0_BASEA 0x56
#define DMFRI1_BASEA 0x56
#define DMSGA_BASEA 0x56
#define DMGDA_BASEA 0x56
#define DMGCR_BASEA 0x56
#define DMGFR_BASEA 0x56
#define DMSRC0_ADDRA (*(volatile unsigned int *) DMSRC0_BASEA)
#define DMSRC1_ADDRA (*(volatile unsigned int *) DMSRC1_BASEA)
#define DMSRC2_ADDRA (*(volatile unsigned int *) DMSRC2_BASEA)
#define DMSRC3_ADDRA (*(volatile unsigned int *) DMSRC3_BASEA)
#define DMSRC4_ADDRA (*(volatile unsigned int *) DMSRC4_BASEA)
#define DMSRC5_ADDRA (*(volatile unsigned int *) DMSRC5_BASEA)
#define DMDST0_ADDRA (*(volatile unsigned int *) DMDST0_BASEA)
#define DMDST1_ADDRA (*(volatile unsigned int *) DMDST1_BASEA)
#define DMDST2_ADDRA (*(volatile unsigned int *) DMDST2_BASEA)
#define DMDST3_ADDRA (*(volatile unsigned int *) DMDST3_BASEA)
#define DMDST4_ADDRA (*(volatile unsigned int *) DMDST4_BASEA)
#define DMDST5_ADDRA (*(volatile unsigned int *) DMDST5_BASEA)
#define DMCTR0_ADDRA (*(volatile unsigned int *) DMCTR0_BASEA)
#define DMCTR1_ADDRA (*(volatile unsigned int *) DMCTR0_BASEA)
#define DMCTR2_ADDRA (*(volatile unsigned int *) DMCTR0_BASEA)
#define DMCTR3_ADDRA (*(volatile unsigned int *) DMCTR0_BASEA)
#define DMCTR4_ADDRA (*(volatile unsigned int *) DMCTR0_BASEA)
#define DMCTR5_ADDRA (*(volatile unsigned int *) DMCTR0_BASEA)
#define DMSFC0_ADDRA ((volatile DMSFCn_REG *) ((char *) DMSFC0_BASEA))
#define DMSFC1_ADDRA ((volatile DMSFCn_REG *) ((char *) DMSFC1_BASEA))
#define DMSFC2_ADDRA ((volatile DMSFCn_REG *) ((char *) DMSFC2_BASEA))
#define DMSFC3_ADDRA ((volatile DMSFCn_REG *) ((char *) DMSFC3_BASEA))
#define DMSFC4_ADDRA ((volatile DMSFCn_REG *) ((char *) DMSFC4_BASEA))
#define DMSFC5_ADDRA ((volatile DMSFCn_REG *) ((char *) DMSFC5_BASEA))
#define DMMCR0_ADDRA ((volatile DMMCRn_REG *) ((char *) DMMCR0_BASEA))
#define DMMCR1_ADDRA ((volatile DMMCRn_REG *) ((char *) DMMCR1_BASEA))
#define DMMCR2_ADDRA ((volatile DMMCRn_REG *) ((char *) DMMCR2_BASEA))
#define DMMCR3_ADDRA ((volatile DMMCRn_REG *) ((char *) DMMCR3_BASEA))
#define DMMCR4_ADDRA ((volatile DMMCRn_REG *) ((char *) DMMCR4_BASEA))
#define DMMCR5_ADDRA ((volatile DMMCRn_REG *) ((char *) DMMCR5_BASEA))
#define DMSRCP_ADDRA ((volatile DMSRCP_REG *) ((char *) DMSRCP_BASEA))
#define DMDSTP_ADDRA ((volatile DMDSTP_REG *) ((char *) DMDSTP_BASEA))
#define DMIDX0_ADDRA (*(volatile unsigned int *) DMIDX0_BASEA)
#define DMIDX1_ADDRA (*(volatile unsigned int *) DMIDX1_BASEA)
#define DMFRI0_ADDRA (*(volatile unsigned int *) DMFRI0_BASEA)
#define DMFRI1_ADDRA (*(volatile unsigned int *) DMFRI1_BASEA)
#define DMSGA_ADDRA (*(volatile unsigned int *) DMSGA_BASEA)
#define DMGDA_ADDRA (*(volatile unsigned int *) DMGDA_BASEA)
#define DMGCR_ADDRA (*(volatile unsigned int *) DMGCR_BASEA)
#define DMGFR_ADDRA (*(volatile unsigned int *) DMGFR_BASEA)
/* Define the base addresses without auto-incrementing */
#define DMSRC0_BASE 0x57
#define DMSRC1_BASE 0x57
#define DMSRC2_BASE 0x57
#define DMSRC3_BASE 0x57
#define DMSRC4_BASE 0x57
#define DMSRC5_BASE 0x57
#define DMDST0_BASE 0x57
#define DMDST1_BASE 0x57
#define DMDST2_BASE 0x57
#define DMDST3_BASE 0x57
#define DMDST4_BASE 0x57
#define DMDST5_BASE 0x57
#define DMCTR0_BASE 0x57
#define DMCTR1_BASE 0x57
#define DMCTR2_BASE 0x57
#define DMCTR3_BASE 0x57
#define DMCTR4_BASE 0x57
#define DMCTR5_BASE 0x57
#define DMSFC0_BASE 0x57
#define DMSFC1_BASE 0x57
#define DMSFC2_BASE 0x57
#define DMSFC3_BASE 0x57
#define DMSFC4_BASE 0x57
#define DMSFC5_BASE 0x57
#define DMMCR0_BASE 0x57
#define DMMCR1_BASE 0x57
#define DMMCR2_BASE 0x57
#define DMMCR3_BASE 0x57
#define DMMCR4_BASE 0x57
#define DMMCR5_BASE 0x57
#define DMSRCP_BASE 0x57
#define DMDSTP_BASE 0x57
#define DMIDX0_BASE 0x57
#define DMIDX1_BASE 0x57
#define DMFRI0_BASE 0x57
#define DMFRI1_BASE 0x57
#define DMSGA_BASE 0x57
#define DMGDA_BASE 0x57
#define DMGCR_BASE 0x57
#define DMGFR_BASE 0x57
#define DMSRC0_ADDR (*(volatile unsigned int *) DMSRC0_BASE)
#define DMSRC1_ADDR (*(volatile unsigned int *) DMSRC1_BASE)
#define DMSRC2_ADDR (*(volatile unsigned int *) DMSRC2_BASE)
#define DMSRC3_ADDR (*(volatile unsigned int *) DMSRC3_BASE)
#define DMSRC4_ADDR (*(volatile unsigned int *) DMSRC4_BASE)
#define DMSRC5_ADDR (*(volatile unsigned int *) DMSRC5_BASE)
#define DMDST0_ADDR (*(volatile unsigned int *) DMDST0_BASE)
#define DMDST1_ADDR (*(volatile unsigned int *) DMDST1_BASE)
#define DMDST2_ADDR (*(volatile unsigned int *) DMDST2_BASE)
#define DMDST3_ADDR (*(volatile unsigned int *) DMDST3_BASE)
#define DMDST4_ADDR (*(volatile unsigned int *) DMDST4_BASE)
#define DMDST5_ADDR (*(volatile unsigned int *) DMDST5_BASE)
#define DMCTR0_ADDR (*(volatile unsigned int *) DMCTR0_BASE)
#define DMCTR1_ADDR (*(volatile unsigned int *) DMCTR1_BASE)
#define DMCTR2_ADDR (*(volatile unsigned int *) DMCTR2_BASE)
#define DMCTR3_ADDR (*(volatile unsigned int *) DMCTR3_BASE)
#define DMCTR4_ADDR (*(volatile unsigned int *) DMCTR4_BASE)
#define DMCTR5_ADDR (*(volatile unsigned int *) DMCTR5_BASE)
#define DMSFC0_ADDR ((volatile DMSFCn_REG *) ((char *) DMSFC0_BASE))
#define DMSFC1_ADDR ((volatile DMSFCn_REG *) ((char *) DMSFC1_BASE))
#define DMSFC2_ADDR ((volatile DMSFCn_REG *) ((char *) DMSFC2_BASE))
#define DMSFC3_ADDR ((volatile DMSFCn_REG *) ((char *) DMSFC3_BASE))
#define DMSFC4_ADDR ((volatile DMSFCn_REG *) ((char *) DMSFC4_BASE))
#define DMSFC5_ADDR ((volatile DMSFCn_REG *) ((char *) DMSFC5_BASE))
#define DMMCR0_ADDR ((volatile DMMCRn_REG *) ((char *) DMMCR0_BASE))
#define DMMCR1_ADDR ((volatile DMMCRn_REG *) ((char *) DMMCR1_BASE))
#define DMMCR2_ADDR ((volatile DMMCRn_REG *) ((char *) DMMCR2_BASE))
#define DMMCR3_ADDR ((volatile DMMCRn_REG *) ((char *) DMMCR3_BASE))
#define DMMCR4_ADDR ((volatile DMMCRn_REG *) ((char *) DMMCR4_BASE))
#define DMMCR5_ADDR ((volatile DMMCRn_REG *) ((char *) DMMCR5_BASE))
#define DMSRCP_ADDR ((volatile DMSRCP_REG *) ((char *) DMSRCP_BASE))
#define DMDSTP_ADDR ((volatile DMDSTP_REG *) ((char *) DMDSTP_BASE))
#define DMIDX0_ADDR (*(volatile unsigned int *) DMIDX0_BASE)
#define DMIDX1_ADDR (*(volatile unsigned int *) DMIDX1_BASE)
#define DMFRI0_ADDR (*(volatile unsigned int *) DMFRI0_BASE)
#define DMFRI1_ADDR (*(volatile unsigned int *) DMFRI1_BASE)
#define DMSGA_ADDR (*(volatile unsigned int *) DMSGA_BASE)
#define DMGDA_ADDR (*(volatile unsigned int *) DMGDA_BASE)
#define DMGCR_ADDR (*(volatile unsigned int *) DMGCR_BASE)
#define DMGFR_ADDR (*(volatile unsigned int *) DMGFR_BASE)
/*-------------------------------------------------------------------*/
/* DMPREC */
/*-------------------------------------------------------------------*/
typedef union {
struct {
unsigned int free:1;
unsigned int rsvd:1;
unsigned int dprc:6;
unsigned int intosel:2;
unsigned int de:6;
} bitval;
unsigned int value;
} DMPREC_REG;
/*-------------------------------------------------------------------*/
/* DMFCn */
/*-------------------------------------------------------------------*/
typedef union {
struct {
unsigned int dsyn:4;
unsigned int dblw:1;
unsigned int rsrvd:3;
unsigned int framecount:8;
} bitval;
unsigned int value;
} DMSFCn_REG;
/*-------------------------------------------------------------------*/
/* DMMCRn */
/*-------------------------------------------------------------------*/
typedef union {
struct {
unsigned int autoinit:1;
unsigned int dinm:1;
unsigned int imod:1;
unsigned int ctmod:1;
unsigned int rsrvd1:1;
unsigned int sind:2;
unsigned int dms:2;
unsigned int rsrvd2:1;
unsigned int dind:3;
unsigned int dmd:2;
} bitval;
unsigned int value;
} DMMCRn_REG;
/*-------------------------------------------------------------------*/
/* DMSRCP */
/*-------------------------------------------------------------------*/
typedef union {
struct {
unsigned int rsvd :9;
unsigned int source :7;
} bitval;
unsigned int value;
} DMSRCP_REG;
/*-------------------------------------------------------------------*/
/* DMDSTP */
/*-------------------------------------------------------------------*/
typedef union {
struct {
unsigned int rsvd :9;
unsigned int dest :7;
} bitval;
unsigned int value;
} DMDSTP_REG;
/******************************************************************/
/* TIMER REGISTERS ADDRESSES */
/*******************************************************************/
#define TIM_BASE 0x24
#define TIM_ADDR *(volatile unsigned int *)0x24
#define PRD_BASE 0x25
#define PRD_ADDR *(volatile unsigned int *)0x25
#define TCR_BASE 0x26
#define TCR_ADDR ((volatile TCR_REG *) ((char *) TCR_BASE))
#define TIM1_BASE 0x30
#define TIM1_ADDR *(volatile unsigned int *)0x30
#define PRD1_BASE 0x31
#define PRD1_ADDR *(volatile unsigned int *)0x31
#define TCR1_BASE 0x32
#define TCR1_ADDR ((volatile TCR_REG *) ((char *) TCR1_BASE))
typedef union {
struct {
unsigned int rsrvd:4;
unsigned int soft:1;
unsigned int free:1;
unsigned int psc:4;
unsigned int trb:1;
unsigned int tss:1;
unsigned int tddr:4;
} bitval;
unsigned int value;
} TCR_REG;
/*********************************************************************/
/* CLOCK MODE REGISTER ADDRESS */
/*********************************************************************/
#define CLKMD_BASE 0x58
#define CLKMD_ADDR ((volatile CLKMD_REG *) ((char *) CLKMD_BASE))
typedef union {
struct {
unsigned int pllmul :4;
unsigned int plldiv :1;
unsigned int pllcount :8;
unsigned int pllon_off :1;
unsigned int pllndiv :1;
unsigned int pllstatus :1;
} bitval;
unsigned int value;
} CLKMD_REG;
/******************************************************************/
/* GPIO */
/******************************************************************/
#define GPIOCR_BASE 0x3c
#define GPIOCR_ADDR ((volatile GPIOCR_REG *) ((char *) GPIOCR_BASE))
#define GPIOSR_BASE 0x3d
#define GPIOSR_ADDR ((volatile GPIOSR_REG *) ((char *) GPIOSR_BASE))
typedef union {
struct {
unsigned int tout1 :1;
unsigned int rsvd :7;
unsigned int dir7 :1;
unsigned int dir6 :1;
unsigned int dir5 :1;
unsigned int dir4 :1;
unsigned int dir3 :1;
unsigned int dir2 :1;
unsigned int dir1 :1;
unsigned int dir0 :1;
} bitval;
unsigned int value;
} GPIOCR_REG;
typedef union {
struct {
unsigned int rsvd :8;
unsigned int io7 :1;
unsigned int io6 :1;
unsigned int io5 :1;
unsigned int io4 :1;
unsigned int io3 :1;
unsigned int io2 :1;
unsigned int io1 :1;
unsigned int io0 :1;
} bitval;
unsigned int value;
} GPIOSR_REG;
typedef union{
struct{
unsigned int bit15 :1;
unsigned int bit14 :1;
unsigned int bit13 :1;
unsigned int bit12 :1;
unsigned int bit11 :1;
unsigned int bit10 :1;
unsigned int bit9 :1;
unsigned int bit8 :1;
unsigned int bit7 :1;
unsigned int bit6 :1;
unsigned int bit5 :1;
unsigned int bit4 :1;
unsigned int bit3 :1;
unsigned int bit2 :1;
unsigned int bit1 :1;
unsigned int bit0 :1;
} bitval;
unsigned int value;
} ISD_REG;//定义ISD寄存器地址类型
typedef union{
struct{
unsigned int rsvd :6;
unsigned int endbit9 :1;
unsigned int bit8 :1;
unsigned int bit7 :1;
unsigned int bit6 :1;
unsigned int bit5 :1;
unsigned int bit4 :1;
unsigned int bit3 :1;
unsigned int bit2 :1;
unsigned int bit1 :1;
unsigned int startbit0 :1;
} bitval;
unsigned int value;
} RECOG_RESULT;
/*下面的数据是程序中要用到的常数之定义*/
//#define ADBUFFER20_BASE 0x0800
//#define ADBUFFER10_BASE 0x0b70
#define ADBUFFER20_BASE 0x0080
#define ADBUFFER10_BASE 0x03f0
#define SNBUFFER10_BASE 0xbc90
#define SNBUFFER20_BASE 0xb920
#define ema 0.95
#define num 16000
#define N 160
#define M 80
#define pi 3.1415926
#define L (num-N)/M
#define MH 10
#define ML 4.4
#define ZCRT 20
/*由于DXR，DRR中低位先出，所以命令字要反折*/
#define POWERUP 0x04
#define SETPLAY 0x07
#define PLAY 0x0F
#define SETREC 0x05
#define REC 0x0D
#define SETMC 0x17
#define MC 0x1F
#define STOP 0x0C
#define STOPPWRDN 0x08
#define RINT 0x0C
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