📄 cotullajtag.h
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/******************************************************************************
**
** COPYRIGHT (C) 2000, 2001 Intel Corporation.
**
** This software as well as the software described in it is furnished under
** license and may only be used or copied in accordance with the terms of the
** license. The information in this file is furnished for informational use
** only, is subject to change without notice, and should not be construed as
** a commitment by Intel Corporation. Intel Corporation assumes no
** responsibility or liability for any errors or inaccuracies that may appear
** in this document or any software that may be provided in association with
** this document.
** Except as permitted by such license, no part of this document may be
** reproduced, stored in a retrieval system, or transmitted in any form or by
** any means without the express written consent of Intel Corporation.
**
** FILENAME: cotullajtag.h
**
** PURPOSE: pin defines for the Cotulla Boundary Scan Chain
**
** LAST MODIFIED: $Modtime: 6/06/01 8:46a $
** --------------------------------------------------------------------------
** Sophia's Sandgete Modified
**
** Ver. 2.09.003 09/09/02 10:31 T.Yokoyama
** Sophia's CPLD length is 5 bits.
******************************************************************************/
#define COTULLA_CHAIN_LENGTH 385
#define SA1110_CHAIN_LENGTH 292
#define SANDGATE_WORKBUF_SIZE 387
#define LUBBOCK_WORKBUF_SIZE 385
#define ASSABET_WORKBUF_SIZE 294
#ifdef SANDGATE_PLATFORM
#define CHAIN_LENGTH COTULLA_CHAIN_LENGTH
#define DEVICES_BEFORE 2 // number of bypass bits before the controller
#define DEVICES_AFTER 0 // number of bypass bits after the controller
#endif //SANDGATE_PLATFORM
#ifdef ASSABET_PLATFORM
#ifndef LUBBOCK_SA1110
#define CHAIN_LENGTH SA1110_CHAIN_LENGTH
#define DEVICES_BEFORE 2 // number of bypass bits before the controller
#define DEVICES_AFTER 0 // number of bypass bits after the controller
#else
#define CHAIN_LENGTH SA1110_CHAIN_LENGTH
#define DEVICES_BEFORE 0 // number of bypass bits before the controller
#define DEVICES_AFTER 0 // number of bypass bits after the controller
#endif
#endif //ASSABET_PLATFORM
#ifdef LUBBOCK_PLATFORM
#define CHAIN_LENGTH COTULLA_CHAIN_LENGTH
#define DEVICES_BEFORE 0 // number of bypass bits before the controller
#define DEVICES_AFTER 0 // number of bypass bits after the controller
#endif //LUBBOCK_PLATFORM
#define MAX_DR_LENGTH 400
#define COTULLA_IRLENGTH 5
#ifdef SOPHIA_SANDGATE
#define PZ_IRLENGTH 5 // Sophia's CPLD length
#else
#define PZ_IRLENGTH 4 // Intel's CPLD length
#endif //SOPHIA_SANDGATE
/*
*******************************************************************************
Cotulla pin defines - note that some pins names do not match the BSDL
exactly because they have been changed to match the code that uses them.
Possible bug here. ******
The cotulla does not have a dedicated set of chip select
pins and uses GPIO pins in an alternate mode to do this work. It is unclear if
these gpio pins need to be enabled through the control pins to activate. If
improper chip selects are happening, this is probably the reason.
*******************************************************************************
*/
#ifndef ASSABET_PLATFORM
#ifdef HX_BOARD
#define gpio0_ctrl 0
#define gpio1_ctrl 1
#define gpio2_ctrl 2
#define gpio3_ctrl 3
#define gpio4_ctrl 4
#define gpio5_ctrl 5
#define gpio6_ctrl 6
#define gpio7_ctrl 7
#define gpio8_ctrl 8
#define gpio9_ctrl 9
#define gpio10_ctrl 10
#define gpio11_ctrl 11
#define gpio12_ctrl 12
#define gpio13_ctrl 13
#define gpio14_ctrl 14
#define gpio15_ctrl 15
#define gpio16_ctrl 16
#define gpio17_ctrl 17
#define gpio18_ctrl 18
#define gpio19_ctrl 19
#define gpio20_ctrl 20
#define gpio21_ctrl 21
#define gpio22_ctrl 22
#define gpio23_ctrl 23
#define gpio24_ctrl 24
#define gpio25_ctrl 25
#define gpio26_ctrl 26
#define gpio27_ctrl 27
#define gpio28_ctrl 28
#define gpio29_ctrl 29
#define gpio30_ctrl 30
#define gpio31_ctrl 31
#define gpio32_ctrl 32
#define gpio33_ctrl 33
#define gpio34_ctrl 34
#define gpio35_ctrl 35
#define gpio36_ctrl 36
#define gpio37_ctrl 37
#define gpio38_ctrl 38
#define gpio39_ctrl 39
#define gpio40_ctrl 40
#define gpio41_ctrl 41
#define gpio42_ctrl 42
#define gpio43_ctrl 43
#define gpio44_ctrl 44
#define gpio45_ctrl 45
#define gpio46_ctrl 46
#define gpio47_ctrl 47
#define gpio48_ctrl 48
#define gpio49_ctrl 49
#define gpio50_ctrl 50
#define gpio51_ctrl 51
#define gpio52_ctrl 52
#define gpio53_ctrl 53
#define gpio54_ctrl 54
#define gpio55_ctrl 55
#define gpio56_ctrl 56
#define gpio57_ctrl 57
#define gpio58_ctrl 58
#define gpio59_ctrl 59
#define gpio60_ctrl 60
#define gpio61_ctrl 61
#define gpio62_ctrl 62
#define gpio63_ctrl 63
#define gpio64_ctrl 64
#define gpio65_ctrl 65
#define gpio66_ctrl 66
#define gpio67_ctrl 67
#define gpio68_ctrl 68
#define gpio69_ctrl 69
#define gpio70_ctrl 70
#define gpio71_ctrl 71
#define gpio72_ctrl 72
#define gpio73_ctrl 73
#define gpio74_ctrl 74
#define gpio75_ctrl 75
#define gpio76_ctrl 76
#define gpio77_ctrl 77
#define gpio78_ctrl 78 //
#define gpio79_ctrl 79
#define gpio80_ctrl 80
#define gpio81_ctrl 81
#define gpio82_ctrl 82
#define gpio83_ctrl 83
#define gpio84_ctrl 84
#define gpio85_ctrl 85
#define gpio86_ctrl 86
#define gpio87_ctrl 87
#define gpio88_ctrl 88
#define gpio89_ctrl 89
#define usb_ctrl_start 90
#define usb_ctrl usb_ctrl_start+0
#define mmdat_ctrl usb_ctrl_start+1
#define mmcmd_ctrl usb_ctrl_start+2
#define mdupper_ctrl usb_ctrl_start+3
#define mdlower_ctrl usb_ctrl_start+4
#define gpio0_start 95
#define gpio0 gpio0_start+0
#define gpio1 gpio0_start+1
#define gpio2 gpio0_start+2
#define gpio3 gpio0_start+3
#define gpio4 gpio0_start+4
#define gpio5 gpio0_start+5
#define gpio6 gpio0_start+6
#define gpio7 gpio0_start+7
#define gpio8 gpio0_start+8
#define gpio9 gpio0_start+9
#define gpio10 gpio0_start+10
#define gpio11 gpio0_start+11
#define gpio12 gpio0_start+12
#define gpio13 gpio0_start+13
#define gpio14 gpio0_start+14
#define nCS1_OUT gpio0_start+15 //gpio15
#define gpio16 gpio0_start+16
#define gpio17 gpio0_start+17
#define gpio18 gpio0_start+18
#define gpio19 gpio0_start+19
#define gpio20 gpio0_start+20
#define gpio21 gpio0_start+21
#define gpio22 gpio0_start+22
#define gpio23 gpio0_start+23
#define gpio24 gpio0_start+24
#define gpio25 gpio0_start+25
#define gpio26 gpio0_start+26
#define gpio27 gpio0_start+27
#define gpio28 gpio0_start+28
#define gpio29 gpio0_start+29
#define gpio30 gpio0_start+30
#define gpio31 gpio0_start+31
#define gpio32 gpio0_start+32
#define nCS5_OUT gpio0_start+33 //gpio33
#define gpio34 gpio0_start+34
#define gpio35 gpio0_start+35
#define gpio36 gpio0_start+36
#define gpio37 gpio0_start+37
#define gpio38 gpio0_start+38
#define gpio39 gpio0_start+39
#define gpio40 gpio0_start+40
#define gpio41 gpio0_start+41
#define gpio42 gpio0_start+42
#define gpio43 gpio0_start+43
#define gpio44 gpio0_start+44
#define gpio45 gpio0_start+45
#define gpio46 gpio0_start+46
#define gpio47 gpio0_start+47
#define gpio48 gpio0_start+48
#define gpio49 gpio0_start+49
#define gpio50 gpio0_start+50
#define gpio51 gpio0_start+51
#define gpio52 gpio0_start+52
#define gpio53 gpio0_start+53
#define gpio54 gpio0_start+54
#define gpio55 gpio0_start+55
#define gpio56 gpio0_start+56
#define gpio57 gpio0_start+57
#define gpio58 gpio0_start+58
#define gpio59 gpio0_start+59
#define gpio60 gpio0_start+60
#define gpio61 gpio0_start+61
#define gpio62 gpio0_start+62
#define gpio63 gpio0_start+63
#define gpio64 gpio0_start+64
#define gpio65 gpio0_start+65
#define gpio66 gpio0_start+66
#define gpio67 gpio0_start+67
#define gpio68 gpio0_start+68
#define gpio69 gpio0_start+69
#define gpio70 gpio0_start+70
#define gpio71 gpio0_start+71
#define gpio72 gpio0_start+72
#define gpio73 gpio0_start+73
#define gpio74 gpio0_start+74
#define gpio75 gpio0_start+75
#define gpio76 gpio0_start+76
#define gpio77 gpio0_start+77
#define nCS2_OUT gpio0_start+78 //gpio78
#define nCS3_OUT gpio0_start+79 //gpio79
#define nCS4_OUT gpio0_start+80 //gpio80
#define gpio81 gpio0_start+81
#define gpio82 gpio0_start+82
#define gpio83 gpio0_start+83
#define gpio84 gpio0_start+84
#define gpio85 gpio0_start+85
#define gpio86 gpio0_start+86
#define gpio87 gpio0_start+87
#define RD_nWR_OUT gpio0_start+88 //gpio88
#define gpio89 gpio0_start+89
#define scl_out_start 185
#define scl_out scl_out_start+0
#define sda_out scl_out_start+1
#define usb_n_out scl_out_start+2
#define usb_p_out scl_out_start+3
#define mmdat_out scl_out_start+4
#define mmcmd_out scl_out_start+5
#define md0_out_start 191
#define md0_out md0_out_start+0
#define md1_out md0_out_start+1
#define md2_out md0_out_start+2
#define md3_out md0_out_start+3
#define md4_out md0_out_start+4
#define md5_out md0_out_start+5
#define md6_out md0_out_start+6
#define md7_out md0_out_start+7
#define md8_out md0_out_start+8
#define md9_out md0_out_start+9
#define md10_out md0_out_start+10
#define md11_out md0_out_start+11
#define md12_out md0_out_start+12
#define md13_out md0_out_start+13
#define md14_out md0_out_start+14
#define md15_out md0_out_start+15
#define md16_out md0_out_start+16
#define md17_out md0_out_start+17
#define md18_out md0_out_start+18
#define md19_out md0_out_start+19
#define md20_out md0_out_start+20
#define md21_out md0_out_start+21
#define md22_out md0_out_start+22
#define md23_out md0_out_start+23
#define md24_out md0_out_start+24
#define md25_out md0_out_start+25
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