📄 95sport2-1.lst
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00030c c08c MOVFF 0x8c,0xff6 TBLPTR = prom; C:\MCC18\src\traditional\startup\c018i.c
00030e fff6
000310 c08d MOVFF 0x8d,0xff7
000312 fff7
000314 c08e MOVFF 0x8e,0xff8
000316 fff8
C:\MCC18\src\traditional\startup\c018i.c
/* do the copy loop */ C:\MCC18\src\traditional\startup\c018i.c
_asm C:\MCC18\src\traditional\startup\c018i.c
// determine if we have any more bytes to copy C:\MCC18\src\traditional\startup\c018i.c
000318 0100 MOVLB 0x0 movlb curr_byte C:\MCC18\src\traditional\startup\c018i.c
00031a 538f MOVF 0x8f,0x1,0x1 movf curr_byte, 1, 1 C:\MCC18\src\traditional\startup\c018i.c
copy_loop: C:\MCC18\src\traditional\startup\c018i.c
00031c e102 BNZ 0x322 bnz 2 // copy_one_byte C:\MCC18\src\traditional\startup\c018i.c
00031e 5390 MOVF 0x90,0x1,0x1 movf curr_byte + 1, 1, 1 C:\MCC18\src\traditional\startup\c018i.c
000320 e007 BZ 0x330 bz 7 // done_copying C:\MCC18\src\traditional\startup\c018i.c
C:\MCC18\src\traditional\startup\c018i.c
copy_one_byte: C:\MCC18\src\traditional\startup\c018i.c
000322 0009 TBLRDPOSTINC tblrdpostinc C:\MCC18\src\traditional\startup\c018i.c
000324 50f5 MOVF 0xf5,0x0,0x0 movf TABLAT, 0, 0 C:\MCC18\src\traditional\startup\c018i.c
000326 6eee MOVWF 0xee,0x0 movwf POSTINC0, 0 C:\MCC18\src\traditional\startup\c018i.c
C:\MCC18\src\traditional\startup\c018i.c
// decrement byte counter C:\MCC18\src\traditional\startup\c018i.c
000328 078f DECF 0x8f,0x1,0x1 decf curr_byte, 1, 1 C:\MCC18\src\traditional\startup\c018i.c
00032a e2f8 BC 0x31c bc -8 // copy_loop C:\MCC18\src\traditional\startup\c018i.c
00032c 0790 DECF 0x90,0x1,0x1 decf curr_byte + 1, 1, 1 C:\MCC18\src\traditional\startup\c018i.c
00032e d7f9 BRA 0x322 bra -7 // copy_one_byte C:\MCC18\src\traditional\startup\c018i.c
C:\MCC18\src\traditional\startup\c018i.c
done_copying: C:\MCC18\src\traditional\startup\c018i.c
C:\MCC18\src\traditional\startup\c018i.c
_endasm C:\MCC18\src\traditional\startup\c018i.c
/* restore the table pointer for the next entry */ C:\MCC18\src\traditional\startup\c018i.c
000330 c093 MOVFF 0x93,0xff6 TBLPTR = data_ptr; C:\MCC18\src\traditional\startup\c018i.c
000332 fff6
000334 c094 MOVFF 0x94,0xff7
000336 fff7
000338 c095 MOVFF 0x95,0xff8
00033a fff8
/* next entry... */ C:\MCC18\src\traditional\startup\c018i.c
00033c 0100 MOVLB 0x0 curr_entry--; C:\MCC18\src\traditional\startup\c018i.c
00033e 0791 DECF 0x91,0x1,0x1
000340 0e00 MOVLW 0x0
000342 5b92 SUBWFB 0x92,0x1,0x1
000344 d7bf BRA 0x2c4 goto test; C:\MCC18\src\traditional\startup\c018i.c
done: C:\MCC18\src\traditional\startup\c018i.c
; C:\MCC18\src\traditional\startup\c018i.c
000346 0012 RETURN 0x0 } C:\MCC18\src\traditional\startup\c018i.c
// crystal 4MHz D:\gary\work\mplab\95sport\95sport2-1.c
#include "p18f452.h" D:\gary\work\mplab\95sport\95sport2-1.c
#include "type_define.h" D:\gary\work\mplab\95sport\95sport2-1.c
D:\gary\work\mplab\95sport\95sport2-1.c
#define KEY_IN LATAbits.LATA0 //analog input D:\gary\work\mplab\95sport\95sport2-1.c
#define S0 LATAbits.LATA1 //analog output D:\gary\work\mplab\95sport\95sport2-1.c
#define S1 LATAbits.LATA2 //analog output D:\gary\work\mplab\95sport\95sport2-1.c
#define S2 LATAbits.LATA3 //analog output D:\gary\work\mplab\95sport\95sport2-1.c
#define S3 LATAbits.LATA5 //analog output D:\gary\work\mplab\95sport\95sport2-1.c
D:\gary\work\mplab\95sport\95sport2-1.c
#define RB0 LATBbits.LATB0 //digital output D:\gary\work\mplab\95sport\95sport2-1.c
#define RB1 LATBbits.LATB1 //digital output D:\gary\work\mplab\95sport\95sport2-1.c
#define RB2 LATBbits.LATB2 //digital output D:\gary\work\mplab\95sport\95sport2-1.c
#define RB3 LATBbits.LATB3 //digital output D:\gary\work\mplab\95sport\95sport2-1.c
#define RB4 LATBbits.LATB4 //digital output D:\gary\work\mplab\95sport\95sport2-1.c
#define RB5 LATBbits.LATB5 //digital output D:\gary\work\mplab\95sport\95sport2-1.c
#define RB6 LATBbits.LATB6 //digital output D:\gary\work\mplab\95sport\95sport2-1.c
#define RB7 LATBbits.LATB7 //digital output D:\gary\work\mplab\95sport\95sport2-1.c
D:\gary\work\mplab\95sport\95sport2-1.c
#define RC0 LATCbits.LATC0 //digital input D:\gary\work\mplab\95sport\95sport2-1.c
#define RC1 LATCbits.LATC1 //digital input D:\gary\work\mplab\95sport\95sport2-1.c
#define RC2 LATCbits.LATC2 //digital input D:\gary\work\mplab\95sport\95sport2-1.c
#define RC3 LATCbits.LATC3 //digital input D:\gary\work\mplab\95sport\95sport2-1.c
#define VT PORTCbits.RC4 //digital input D:\gary\work\mplab\95sport\95sport2-1.c
#define KEY1 LATCbits.LATC5 //digital output D:\gary\work\mplab\95sport\95sport2-1.c
#define KEY2 LATCbits.LATC6 //digital output D:\gary\work\mplab\95sport\95sport2-1.c
#define KEY3 LATCbits.LATC7 //digital output D:\gary\work\mplab\95sport\95sport2-1.c
D:\gary\work\mplab\95sport\95sport2-1.c
#define RD0 LATDbits.LATD0 //digital output D:\gary\work\mplab\95sport\95sport2-1.c
#define RD1 LATDbits.LATD1 //digital output D:\gary\work\mplab\95sport\95sport2-1.c
#define RD2 LATDbits.LATD2 //digital output D:\gary\work\mplab\95sport\95sport2-1.c
#define RD3 LATDbits.LATD3 //digital output D:\gary\work\mplab\95sport\95sport2-1.c
#define TE LATDbits.LATD4 //digital output D:\gary\work\mplab\95sport\95sport2-1.c
D:\gary\work\mplab\95sport\95sport2-1.c
#define LE0 LATEbits.LATE0 //digital output D:\gary\work\mplab\95sport\95sport2-1.c
#define LE1 LATEbits.LATE1 //digital output D:\gary\work\mplab\95sport\95sport2-1.c
#define LE2 LATEbits.LATE2 //digital output D:\gary\work\mplab\95sport\95sport2-1.c
D:\gary\work\mplab\95sport\95sport2-1.c
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