📄 isd51.lst
字号:
AX51 MACRO ASSEMBLER ISD51 11/23/05 16:37:35 PAGE 1
MACRO ASSEMBLER AX51 V3.01
OBJECT MODULE PLACED IN .\Keil\ISD51.obj
ASSEMBLER INVOKED BY: C:\Keil\C51\BIN\AX51.EXE ISD51.A51 MOD_MX51 SET(SMALL) DEBUG PRINT(.\Keil\ISD51.lst) OBJECT(.\Keil
\ISD51.obj) EP
LOC OBJ LINE SOURCE
1 $nomod51
2 ;------------------------------------------------------------------------------
3 ; ISD51 In-System Debugger for 8051 based microcontrollers
4 ; Copyright KEIL ELEKTRONIK GmbH and Keil Software, Inc. 2000 - 2003
5 ; Version 2.05
6 ;------------------------------------------------------------------------------
7 ; ISD51.A51: This module needs to be added to the user application
8 ;
9 ; Copy this file to your project folder and add the copy to your uVision2
10 ; project. You can customize several parameters of the ISD51 In-System
11 ; Monitor within this configuration file.
12 ;
13 ; ISD51 V2.00: added new features like user I/O and hardware breakpoints.
14 ; ISD51 V2.02: fixed a problem when single stepping through putchar
15 ;
16 ; ISD51 V2.03: adapted for TI AUX Interupt (EAI Bit save/restore added)
17 ; ISD51 V2.04: 'Stop' command did not break program execution on targets that
18 ; do not have hardware breakpoints
19 ; ISD51 V2.05: when ISD51 is not started, getkey return value was not in R7.
20 ;------------------------------------------------------------------------------
21
22 ;#include "ISD51.H"
+1 23
+1 24
+1 25
+1 26
+1 27
+1 28
+1 29
+1 30
+1 31
+1 32
+1 33
+1 34
+1 35
+1 36
+1 37
+1 38
+1 39
+1 40
+1 41
+1 42
+1 43
+1 44
+1 45
+1 46
+1 47
+1 48
+1 49
+1 50
+1 51
+1 52
+1 53
+1 54
+1 55
+1 56
+1 57
AX51 MACRO ASSEMBLER ISD51 11/23/05 16:37:35 PAGE 2
+1 58
+1 59
+1 60
+1 61
+1 62
+1 63
+1 64
+1 65
+1 66
+1 67
+1 68
0098 +1 69 sfr SCON = 0x98;
0099 +1 70 sfr SBUF = 0x99;
00A8 +1 71 sfr IE = 0xA8;
+1 72
+1 73
0098.1 +1 74 sbit TI = SCON^1;
0098.0 +1 75 sbit RI = SCON^0;
+1 76
+1 77
00A8.4 +1 78 sbit ES = IE^4;
00A8.7 +1 79 sbit EA = IE^7;
+1 80
+1 81 CLR_TI MACRO ; Clear Transmit Interrupt Flag
+1 82 CLR TI ; No CPU register may be changed here
+1 83 ENDM
+1 84
+1 85 SET_TI MACRO ; Set Transmit Interrupt Flag
+1 86 SETB TI ; No CPU register may be changed here
+1 87 ENDM
+1 88
+1 89 JNB_TI MACRO label ; Jump if Transmit Interrupt Flag not set
+1 90 JNB TI,label ; PSW may be modified without saving it
+1 91 ENDM
+1 92
+1 93 WR_SBUF MACRO ; Write ACC to SBUF
+1 94 MOV SBUF,A ; ACC and PSW may be modified without saving it
+1 95 ENDM
+1 96
+1 97 CLR_RI MACRO ; Clear Receiver Interrupt Flag
+1 98 CLR RI ; No CPU register may be changed here
+1 99 ENDM
+1 100
+1 101 JB_RI MACRO label ; Jump if Receiver Interrupt Flag set
+1 102 JB RI,label ; ACC and PSW may be modified without saving it
+1 103 ENDM
+1 104
+1 105 JNB_RI MACRO label ; Jump if Receiver Interrupt Flag not set
+1 106 JNB RI,label ; ACC and PSW may be modified without saving it
+1 107 ENDM
+1 108
+1 109 RD_SBUF MACRO ; Return SBUF in ACC
+1 110 MOV A,SBUF ; ACC and PSW may be modified without saving it
+1 111 ENDM
+1 112
+1 113 CLR_ES MACRO ; Disable Serial Interrupt
+1 114 CLR ES ; No CPU register may be changed here
+1 115 ENDM
+1 116
+1 117 SET_ES MACRO ; Enable Serial Interrupt
+1 118 SETB ES ; No CPU register may be changed here
+1 119 ENDM
+1 120
+1 121 JNB_ES MACRO label ; Jump if Receiver Interrupt Flag not set
+1 122 JNB ES,label ; ACC and PSW may be modified without saving it
+1 123 ENDM
AX51 MACRO ASSEMBLER ISD51 11/23/05 16:37:35 PAGE 3
+1 124
+1 125 SAVE_ES MACRO ; Save Serial Interrupt enable bit to Carry
+1 126 MOV C,ES ; ACC and PSW may be modified without saving it
+1 127 ENDM
+1 128
+1 129 RESTO_ES MACRO ; Restore Serial Interrupt enable bit from Carry
+1 130 MOV ES,C ; ACC and PSW may be modified without saving it
+1 131 ENDM
+1 132
0023 +1 133 SINTRVEC EQU 0x23 ; Interrupt Vector Address of UART interrupt
+1 134
+1 135
+1 136
+1 137
+1 138
+1 139
+1 140
+1 141
+1 142
+1 143
+1 144
+1 145
+1 146
+1 147
+1 148
+1 149
+1 150
+1 151
+1 152
+1 153
+1 154
+1 155
+1 156
+1 157
+1 158
+1 159
+1 160
+1 161 CWRITE MACRO ; write new content data to Flash CODE ROM block
+1 162 ; Flash block address in DPTR
+1 163 ENDM
+1 164
+1 165
+1 166
+1 167
+1 168
+1 169
+1 170
+1 171
+1 172
+1 173
+1 174
+1 175
+1 176
+1 177
+1 178
+1 179
+1 180
+1 181
+1 182
+1 183
+1 184
+1 185
+1 186
+1 187
+1 188
+1 189
AX51 MACRO ASSEMBLER ISD51 11/23/05 16:37:35 PAGE 4
+1 190
+1 191
+1
+1
+1
+1
+1
+1
+1
+1
+1
+1
+1
+1
+1
+1
+1
+1
+1
+1
+1
+1
+1
+1
+1
+1
+1
+1
+1
+1
+1
+1
+1
+1
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -