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- CFG_MEMTEST_START, CFG_MEMTEST_END: Begin and End addresses of the area used by the simple memory test.- CFG_ALT_MEMTEST: Enable an alternate, more extensive memory test.- CFG_MEMTEST_SCRATCH: Scratch address used by the alternate memory test You only need to set this if address zero isn't writeable- CFG_TFTP_LOADADDR: Default load address for network file downloads- CFG_LOADS_BAUD_CHANGE: Enable temporary baudrate change while serial download- CFG_SDRAM_BASE: Physical start address of SDRAM. _Must_ be 0 here.- CFG_MBIO_BASE: Physical start address of Motherboard I/O (if using a Cogent motherboard)- CFG_FLASH_BASE: Physical start address of Flash memory.- CFG_MONITOR_BASE: Physical start address of boot monitor code (set by make config files to be same as the text base address (TEXT_BASE) used when linking) - same as CFG_FLASH_BASE when booting from flash.- CFG_MONITOR_LEN: Size of memory reserved for monitor code, used to determine _at_compile_time_ (!) if the environment is embedded within the U-Boot image, or in a separate flash sector.- CFG_MALLOC_LEN: Size of DRAM reserved for malloc() use.- CFG_BOOTMAPSZ: Maximum size of memory mapped by the startup code of the Linux kernel; all data that must be processed by the Linux kernel (bd_info, boot arguments, eventually initrd image) must be put below this limit.- CFG_MAX_FLASH_BANKS: Max number of Flash memory banks- CFG_MAX_FLASH_SECT: Max number of sectors on a Flash chip- CFG_FLASH_ERASE_TOUT: Timeout for Flash erase operations (in ms)- CFG_FLASH_WRITE_TOUT: Timeout for Flash write operations (in ms)- CFG_FLASH_LOCK_TOUT Timeout for Flash set sector lock bit operation (in ms)- CFG_FLASH_UNLOCK_TOUT Timeout for Flash clear lock bits operation (in ms)- CFG_FLASH_PROTECTION If defined, hardware flash sectors protection is used instead of U-Boot software protection.- CFG_DIRECT_FLASH_TFTP: Enable TFTP transfers directly to flash memory; without this option such a download has to be performed in two steps: (1) download to RAM, and (2) copy from RAM to flash. The two-step approach is usually more reliable, since you can check if the download worked before you erase the flash, but in some situations (when sytem RAM is too limited to allow for a tempory copy of the downloaded image) this option may be very useful.- CFG_FLASH_CFI: Define if the flash driver uses extra elements in the common flash structure for storing flash geometry.- CFG_FLASH_CFI_DRIVER This option also enables the building of the cfi_flash driver in the drivers directory- CFG_RX_ETH_BUFFER: Defines the number of ethernet receive buffers. On some ethernet controllers it is recommended to set this value to 8 or even higher (EEPRO100 or 405 EMAC), since all buffers can be full shortly after enabling the interface on high ethernet traffic. Defaults to 4 if not defined.The following definitions that deal with the placement and managementof environment data (variable area); in general, we support thefollowing configurations:- CFG_ENV_IS_IN_FLASH: Define this if the environment is in flash memory. a) The environment occupies one whole flash sector, which is "embedded" in the text segment with the U-Boot code. This happens usually with "bottom boot sector" or "top boot sector" type flash chips, which have several smaller sectors at the start or the end. For instance, such a layout can have sector sizes of 8, 2x4, 16, Nx32 kB. In such a case you would place the environment in one of the 4 kB sectors - with U-Boot code before and after it. With "top boot sector" type flash chips, you would put the environment in one of the last sectors, leaving a gap between U-Boot and the environment. - CFG_ENV_OFFSET: Offset of environment data (variable area) to the beginning of flash memory; for instance, with bottom boot type flash chips the second sector can be used: the offset for this sector is given here. CFG_ENV_OFFSET is used relative to CFG_FLASH_BASE. - CFG_ENV_ADDR: This is just another way to specify the start address of the flash sector containing the environment (instead of CFG_ENV_OFFSET). - CFG_ENV_SECT_SIZE: Size of the sector containing the environment. b) Sometimes flash chips have few, equal sized, BIG sectors. In such a case you don't want to spend a whole sector for the environment. - CFG_ENV_SIZE: If you use this in combination with CFG_ENV_IS_IN_FLASH and CFG_ENV_SECT_SIZE, you can specify to use only a part of this flash sector for the environment. This saves memory for the RAM copy of the environment. It may also save flash memory if you decide to use this when your environment is "embedded" within U-Boot code, since then the remainder of the flash sector could be used for U-Boot code. It should be pointed out that this is STRONGLY DISCOURAGED from a robustness point of view: updating the environment in flash makes it always necessary to erase the WHOLE sector. If something goes wrong before the contents has been restored from a copy in RAM, your target system will be dead. - CFG_ENV_ADDR_REDUND CFG_ENV_SIZE_REDUND These settings describe a second storage area used to hold a redundand copy of the environment data, so that there is a valid backup copy in case there is a power failure during a "saveenv" operation.BE CAREFUL! Any changes to the flash layout, and some changes to thesource code will make it necessary to adapt <board>/u-boot.lds*accordingly!- CFG_ENV_IS_IN_NVRAM: Define this if you have some non-volatile memory device (NVRAM, battery buffered SRAM) which you want to use for the environment. - CFG_ENV_ADDR: - CFG_ENV_SIZE: These two #defines are used to determin the memory area you want to use for environment. It is assumed that this memory can just be read and written to, without any special provision.BE CAREFUL! The first access to the environment happens quite earlyin U-Boot initalization (when we try to get the setting of for theconsole baudrate). You *MUST* have mappend your NVRAM area then, orU-Boot will hang.Please note that even with NVRAM we still use a copy of theenvironment in RAM: we could work on NVRAM directly, but we want tokeep settings there always unmodified except somebody uses "saveenv"to save the current settings.- CFG_ENV_IS_IN_EEPROM: Use this if you have an EEPROM or similar serial access device and a driver for it. - CFG_ENV_OFFSET: - CFG_ENV_SIZE: These two #defines specify the offset and size of the environment area within the total memory of your EEPROM. - CFG_I2C_EEPROM_ADDR: If defined, specified the chip address of the EEPROM device. The default address is zero. - CFG_EEPROM_PAGE_WRITE_BITS: If defined, the number of bits used to address bytes in a single page in the EEPROM device. A 64 byte page, for example would require six bits. - CFG_EEPROM_PAGE_WRITE_DELAY_MS: If defined, the number of milliseconds to delay between page writes. The default is zero milliseconds. - CFG_I2C_EEPROM_ADDR_LEN: The length in bytes of the EEPROM memory array address. Note that this is NOT the chip address length! - CFG_I2C_EEPROM_ADDR_OVERFLOW: EEPROM chips that implement "address overflow" are ones like Catalyst 24WC04/08/16 which has 9/10/11 bits of address and the extra bits end up in the "chip address" bit slots. This makes a 24WC08 (1Kbyte) chip look like four 256 byte chips. Note that we consider the length of the address field to still be one byte because the extra address bits are hidden in the chip address. - CFG_EEPROM_SIZE: The size in bytes of the EEPROM device.- CFG_ENV_IS_IN_DATAFLASH: Define this if you have a DataFlash memory device which you want to use for the environment. - CFG_ENV_OFFSET: - CFG_ENV_ADDR: - CFG_ENV_SIZE: These three #defines specify the offset and size of the environment area within the total memory of your DataFlash placed at the specified address.- CFG_ENV_IS_IN_NAND: Define this if you have a NAND device which you want to use for the environment. - CFG_ENV_OFFSET: - CFG_ENV_SIZE: These two #defines specify the offset and size of the environment area within the first NAND device.- CFG_SPI_INIT_OFFSET Defines offset to the initial SPI buffer area in DPRAM. The area is used at an early stage (ROM part) if the environment is configured to reside in the SPI EEPROM: We need a 520 byte scratch DPRAM area. It is used between the two initialization calls (spi_init_f() and spi_init_r()). A value of 0xB00 seems to be a good choice since it makes it far enough from the start of the data area as well as from the stack pointer.Please note that the environment is read-only as long as the monitorhas been relocated to RAM and a RAM copy of the environment has beencreated; also, when using EEPROM you will have to use getenv_r()until then to read environment variables.The environment is protected by a CRC32 checksum. Before the monitoris relocated into RAM, as a result of a bad CRC you will be workingwith the compiled-in default environment - *silently*!!! [This isnecessary, because the first environment variable we need is the"baudrate" setting for the console - if we have a bad CRC, we don'thave any device yet where we could complain.]Note: once the monitor has been relocated, then it will complain ifthe default environment is used; a new CRC is computed as soon as youuse the "saveenv" command to store a valid environment.- CFG_FAULT_ECHO_LINK_DOWN: Echo the inverted Ethernet link state to the fault LED. Note: If this option is active, then CFG_FAULT_MII_ADDR also needs to be defined.- CFG_FAULT_MII_ADDR: MII address of the PHY to check for the Ethernet link state.- CFG_64BIT_VSPRINTF: Makes vsprintf (and all *printf functions) support printing of 64bit values by using the L quantifier- CFG_64BIT_STRTOUL: Adds simple_strtoull that returns a 64bit valueLow Level (hardware related) configuration options:---------------------------------------------------- CFG_CACHELINE_SIZE: Cache Line Size of the CPU.- CFG_DEFAULT_IMMR: Default address of the IMMR after system reset. Needed on some 8260 systems (MPC8260ADS, PQ2FADS-ZU, and RPXsuper) to be able to adjust the position of the IMMR register after a reset.- Floppy Disk Support: CFG_FDC_DRIVE_NUMBER the default drive number (default value 0) CFG_ISA_IO_STRIDE defines the spacing between fdc chipset registers (default value 1) CFG_ISA_IO_OFFSET defines the offset of register from address. It depends on which part of the data bus is connected to the fdc chipset. (default value 0) If CFG_ISA_IO_STRIDE CFG_ISA_IO_OFFSET and CFG_FDC_DRIVE_NUMBER are undefined, they take their default value. if CFG_FDC_HW_INIT is defined, then the function fdc_hw_init() is called at the beginning of the FDC setup. fdc_hw_init() must be provided by the board source code. It is used to make hardware dependant initializations.- CFG_IMMR: Physical address of the Internal Memory. DO NOT CHANGE unless you know exactly what you're doing! (11-4) [MPC8xx/82xx systems only]- CFG_INIT_RAM_ADDR: Start address of memory area that can be used for initial data and stack; please note that this must be writable memory that is working WITHOUT special initialization, i. e. you CANNOT use normal RAM which will become available only after programming the memory controller and running certain initialization sequences. U-Boot uses the following memory types: - MPC8xx and MPC8260: IMMR (internal memory of the CPU) - MPC824X: data cache - PPC4xx: data cache- CFG_GBL_DATA_OFFSET: Offset of the initial data structure in the memory area defined by CFG_INIT_RAM_ADDR. Usually CFG_GBL_DATA_OFFSET is chosen such that the initial data is located at the end of the available space (sometimes written as (CFG_INIT_RAM_END - CFG_INIT_DATA_SIZE), and the initial stack is just below that area (growing from (CFG_INIT_RAM_ADDR + CFG_GBL_DATA_OFFSET) downward. Note: On the MPC824X (or other systems that use the data cache for initial memory) the address chosen for CFG_INIT_RAM_ADDR is basically arbitrary - it must point to an otherwise UNUSED address space between the top of RAM and the start of the PCI space.- CFG_SIUMCR: SIU Module Configuration (11-6)- CFG_SYPCR: System Protection Control (11-9)- CFG_TBSCR: Time Base Status and Control (11-26)- CFG_PISCR: Periodic Interrupt Status and Control (11-31)- CFG_PLPRCR: PLL, Low-Power, and Reset Control Register (15-30)- CFG_SCCR: System Clock and reset Control Register (15-27)- CFG_OR_TIMING_SDRAM: SDRAM timing- CFG_MAMR_PTA: periodic timer for refresh- CFG_DER: Debug Event Register (37-47)- FLASH_BASE0_PRELIM, FLASH_BASE1_PRELIM, CFG_REMAP_OR_AM, CFG_PRELIM_OR_AM, CFG_OR_TIMING_FLASH, CFG_O
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