ryxiangwei.fit.eqn

数字相位计实现

C5L2_or_out = C5L2_p1_out # C5L2_p2_out # C5L2_p3_out;
C5L2 = C5L2_or_out;


--E2L8 is lpm_add_sub:i_rtl_1|look_add:look_ahead_unit|$00005~396 at LC2
E2L8_p0_out = E2L3 & E2L4 & C5L5 & C5L4 & E2L5 & E2L6 & E2L7 & add_num[6] & out_link[6];
E2L8_p1_out = E2L3 & E2L4 & add_num[9] & C5L5 & C5L4 & out_link[9];
E2L8_p2_out = E2L3 & E2L4 & C5L5 & C5L4 & E2L5 & add_num[8] & out_link[8];
E2L8_p3_out = E2L3 & E2L4 & C5L5 & C5L4 & E2L5 & E2L6 & add_num[7] & out_link[7];
E2L8_p4_out = E2L3 & E2L4 & C5L5 & C5L4 & E2L5 & E2L6 & C4L41 & C4L6;
E2L8_or_out = E2L9 # E2L8_p0_out # E2L8_p1_out # E2L8_p2_out # E2L8_p3_out # E2L8_p4_out;
E2L8 = E2L8_or_out;


--add_num[16] is add_num[16] at LC81
add_num[16]_p1_out = Load & E2L8 & !add_num[16];
add_num[16]_p2_out = Load & !E2L8 & add_num[16];
add_num[16]_or_out = add_num[16]_p1_out # add_num[16]_p2_out;
add_num[16]_reg_input = add_num[16]_or_out;
add_num[16] = DFFE(add_num[16]_reg_input, GLOBAL(clk), , , );


--out_link_link1[7] is out_link_link1[7] at LC63
out_link_link1[7]_or_out = out_link_link[7];
out_link_link1[7]_reg_input = out_link_link1[7]_or_out;
out_link_link1[7]_p3_out = !Load & out_link_link[16];
out_link_link1[7] = DFFE(out_link_link1[7]_reg_input, GLOBAL(clk), , , out_link_link1[7]_p3_out);


--out_link_link1[6] is out_link_link1[6] at LC125
out_link_link1[6]_or_out = out_link_link[6];
out_link_link1[6]_reg_input = out_link_link1[6]_or_out;
out_link_link1[6]_p3_out = !Load & out_link_link[16];
out_link_link1[6] = DFFE(out_link_link1[6]_reg_input, GLOBAL(clk), , , out_link_link1[6]_p3_out);


--B1L3 is lpm_add_sub:i_rtl_0|datab_node[6]~65 at LC103
B1L3_p1_out = add_num[21] & add_num[20] & add_num[19] & add_num[18] & add_num[17] & E2L8 & add_num[16];
B1L3_or_out = !add_num[22];
B1L3 = B1L3_p1_out $ B1L3_or_out;


--out_link_link1[5] is out_link_link1[5] at LC118
out_link_link1[5]_or_out = out_link_link[5];
out_link_link1[5]_reg_input = out_link_link1[5]_or_out;
out_link_link1[5]_p3_out = !Load & out_link_link[16];
out_link_link1[5] = DFFE(out_link_link1[5]_reg_input, GLOBAL(clk), , , out_link_link1[5]_p3_out);


--B1L2 is lpm_add_sub:i_rtl_0|datab_node[5]~69 at LC109
B1L2_p1_out = add_num[20] & add_num[19] & add_num[18] & add_num[17] & E2L8 & add_num[16];
B1L2_or_out = !add_num[21];
B1L2 = B1L2_p1_out $ B1L2_or_out;


--out_link_link1[3] is out_link_link1[3] at LC127
out_link_link1[3]_or_out = out_link_link[3];
out_link_link1[3]_reg_input = out_link_link1[3]_or_out;
out_link_link1[3]_p3_out = !Load & out_link_link[16];
out_link_link1[3] = DFFE(out_link_link1[3]_reg_input, GLOBAL(clk), , , out_link_link1[3]_p3_out);


--out_link_link1[2] is out_link_link1[2] at LC123
out_link_link1[2]_or_out = out_link_link[2];
out_link_link1[2]_reg_input = out_link_link1[2]_or_out;
out_link_link1[2]_p3_out = !Load & out_link_link[16];
out_link_link1[2] = DFFE(out_link_link1[2]_reg_input, GLOBAL(clk), , , out_link_link1[2]_p3_out);


--out_link_link[4] is out_link_link[4] at LC124
out_link_link[4]_or_out = out_link_link[3];
out_link_link[4]_reg_input = out_link_link[4]_or_out;
out_link_link[4] = DFFE(out_link_link[4]_reg_input, !Txd, , , );


--out_link_link[16] is out_link_link[16] at LC113
out_link_link[16]_or_out = out_link_link[15];
out_link_link[16]_reg_input = out_link_link[16]_or_out;
out_link_link[16] = DFFE(out_link_link[16]_reg_input, !Txd, , , );


--out_link_link[1] is out_link_link[1] at LC60
out_link_link[1]_or_out = out_link_link[0];
out_link_link[1]_reg_input = out_link_link[1]_or_out;
out_link_link[1] = DFFE(out_link_link[1]_reg_input, !Txd, , , );


--out_link_link[0] is out_link_link[0] at LC95
out_link_link[0]_or_out = Rxd;
out_link_link[0]_reg_input = out_link_link[0]_or_out;
out_link_link[0] = DFFE(out_link_link[0]_reg_input, !Txd, , , );


--out_link_link[7] is out_link_link[7] at LC122
out_link_link[7]_or_out = out_link_link[6];
out_link_link[7]_reg_input = out_link_link[7]_or_out;
out_link_link[7] = DFFE(out_link_link[7]_reg_input, !Txd, , , );


--out_link_link[6] is out_link_link[6] at LC121
out_link_link[6]_or_out = out_link_link[5];
out_link_link[6]_reg_input = out_link_link[6]_or_out;
out_link_link[6] = DFFE(out_link_link[6]_reg_input, !Txd, , , );


--out_link_link[5] is out_link_link[5] at LC37
out_link_link[5]_or_out = out_link_link[4];
out_link_link[5]_reg_input = out_link_link[5]_or_out;
out_link_link[5] = DFFE(out_link_link[5]_reg_input, !Txd, , , );


--out_link_link[3] is out_link_link[3] at LC116
out_link_link[3]_or_out = out_link_link[2];
out_link_link[3]_reg_input = out_link_link[3]_or_out;
out_link_link[3] = DFFE(out_link_link[3]_reg_input, !Txd, , , );


--out_link_link[2] is out_link_link[2] at LC48
out_link_link[2]_or_out = out_link_link[1];
out_link_link[2]_reg_input = out_link_link[2]_or_out;
out_link_link[2] = DFFE(out_link_link[2]_reg_input, !Txd, , , );


--out_link_link[15] is out_link_link[15] at LC126
out_link_link[15]_or_out = out_link_link[14];
out_link_link[15]_reg_input = out_link_link[15]_or_out;
out_link_link[15] = DFFE(out_link_link[15]_reg_input, !Txd, , , );


--C5L21 is lpm_add_sub:i_rtl_1|addcore:adder[1]|unreg_res_node[7]~46 at SEXP38
C5L21 = EXP(!add_num[14] & !out_link[14]);


--C5L8 is lpm_add_sub:i_rtl_1|addcore:adder[1]|tot_cin_node[6]~85 at LC4
C5L8_p0_out = E2L3 & E2L4 & E2L5 & E2L6 & E2L7 & add_num[6] & out_link[6];
C5L8_p1_out = E2L3 & E2L4 & add_num[9] & out_link[9];
C5L8_p2_out = E2L3 & E2L4 & E2L5 & add_num[8] & out_link[8];
C5L8_p3_out = E2L3 & E2L4 & E2L5 & E2L6 & add_num[7] & out_link[7];
C5L8_p4_out = E2L3 & E2L4 & E2L5 & E2L6 & C4L41 & C4L6;
C5L8_or_out = C5L9 # C5L8_p0_out # C5L8_p1_out # C5L8_p2_out # C5L8_p3_out # C5L8_p4_out;
C5L8 = C5L8_or_out;


--C5L31 is lpm_add_sub:i_rtl_1|addcore:adder[1]|unreg_res_node[7]~48 at SEXP40
C5L31 = EXP(add_num[15] & out_link[15]);


--C5L41 is lpm_add_sub:i_rtl_1|addcore:adder[1]|unreg_res_node[7]~49 at SEXP41
C5L41 = EXP(!add_num[15] & !out_link[15]);


--C5L51 is lpm_add_sub:i_rtl_1|addcore:adder[1]|unreg_res_node[7]~50 at LC39
C5L51_p1_out = C5L31 & C5L41;
C5L51_p0_out = C5L21 & E2L2 & C5L8 & C5L6;
C5L51_p2_out = add_num[14] & out_link[14];
C5L51_p3_out = C5L21 & add_num[13] & out_link[13];
C5L51_p4_out = C5L21 & E2L2 & add_num[12] & out_link[12];
C5L51_or_out = C5L51_p0_out # C5L51_p2_out # C5L51_p3_out # C5L51_p4_out;
C5L51 = C5L51_p1_out $ C5L51_or_out;


--add_num[15] is add_num[15] at LC87
add_num[15]_p1_out = Load & C5L51;
add_num[15]_or_out = add_num[15]_p1_out;
add_num[15]_reg_input = add_num[15]_or_out;
add_num[15] = DFFE(add_num[15]_reg_input, GLOBAL(clk), , , );


--out_link[15] is out_link[15] at LC120
out_link[15]_or_out = out_link_link[15];
out_link[15]_reg_input = out_link[15]_or_out;
out_link[15]_p3_out = !Load & !out_link_link[16];
out_link[15] = DFFE(out_link[15]_reg_input, GLOBAL(clk), , , out_link[15]_p3_out);


--A1L15 is i76~8 at SEXP42
A1L15 = EXP(add_num[12] & out_link[12]);


--A1L25 is i76~10 at SEXP43
A1L25 = EXP(add_num[13] & out_link[13]);


--A1L35 is i76~11 at SEXP44
A1L35 = EXP(C5L8 & C5L6);


--add_num[14] is add_num[14] at LC36
add_num[14]_p0_out = Load & out_link[14] & !add_num[14] & A1L35 & A1L25 & A1L15;
add_num[14]_p1_out = E2L2 & Load & !out_link[14] & !add_num[14] & add_num[12] & out_link[12];
add_num[14]_p2_out = E2L2 & Load & out_link[14] & add_num[14] & C5L8 & C5L6;
add_num[14]_p3_out = E2L2 & Load & out_link[14] & add_num[14] & add_num[12] & out_link[12];
add_num[14]_p4_out = Load & !out_link[14] & add_num[14] & A1L35 & A1L25 & A1L15;
add_num[14]_or_out = A1L45 # add_num[14]_p0_out # add_num[14]_p1_out # add_num[14]_p2_out # add_num[14]_p3_out # add_num[14]_p4_out;
add_num[14]_reg_input = add_num[14]_or_out;
add_num[14] = DFFE(add_num[14]_reg_input, GLOBAL(clk), , , );


--out_link[14] is out_link[14] at LC128
out_link[14]_or_out = out_link_link[14];
out_link[14]_reg_input = out_link[14]_or_out;
out_link[14]_p3_out = !Load & !out_link_link[16];
out_link[14] = DFFE(out_link[14]_reg_input, GLOBAL(clk), , , out_link[14]_p3_out);


--add_num[13] is add_num[13] at LC34
add_num[13]_p1_out = Load & !out_link[13];
add_num[13]_p0_out = C5L8 & add_num[13] & Load & C5L6;
add_num[13]_p2_out = !add_num[12] & !C5L8 & !add_num[13] & Load;
add_num[13]_p3_out = !add_num[12] & !add_num[13] & Load & !out_link[12];
add_num[13]_p4_out = !C5L8 & !add_num[13] & Load & !out_link[12];
add_num[13]_or_out = A1L55 # add_num[13]_p0_out # add_num[13]_p2_out # add_num[13]_p3_out # add_num[13]_p4_out;
add_num[13]_reg_input = add_num[13]_p1_out $ add_num[13]_or_out;
add_num[13] = DFFE(add_num[13]_reg_input, GLOBAL(clk), , , );


--out_link[13] is out_link[13] at LC68
out_link[13]_or_out = out_link_link[13];
out_link[13]_reg_input = out_link[13]_or_out;
out_link[13]_p3_out = !Load & !out_link_link[16];
out_link[13] = DFFE(out_link[13]_reg_input, GLOBAL(clk), , , out_link[13]_p3_out);


--add_num[12] is add_num[12] at LC38
add_num[12]_p1_out = Load & !C5L8 & add_num[12] & !out_link[12];
add_num[12]_p2_out = Load & !C5L8 & !add_num[12] & out_link[12];
add_num[12]_p3_out = Load & C5L8 & !add_num[12] & !out_link[12];
add_num[12]_p4_out = Load & C5L8 & add_num[12] & out_link[12];
add_num[12]_or_out = add_num[12]_p1_out # add_num[12]_p2_out # add_num[12]_p3_out # add_num[12]_p4_out;
add_num[12]_reg_input = add_num[12]_or_out;
add_num[12] = DFFE(add_num[12]_reg_input, GLOBAL(clk), , , );


--out_link[12] is out_link[12] at LC65
out_link[12]_or_out = out_link_link[12];
out_link[12]_reg_input = out_link[12]_or_out;
out_link[12]_p3_out = !Load & !out_link_link[16];
out_link[12] = DFFE(out_link[12]_reg_input, GLOBAL(clk), , , out_link[12]_p3_out);


--C5L3 is lpm_add_sub:i_rtl_1|addcore:adder[1]|pc[2]~73 at LC13
C5L3_p1_out = E2L6 & E2L5 & E2L4 & add_num[7] & out_link[7];
C5L3_p2_out = E2L6 & E2L5 & E2L4 & C4L41 & C4L6;
C5L3_p3_out = E2L6 & E2L5 & E2L4 & E2L7 & add_num[6] & out_link[6];
C5L3_or_out = C5L3_p1_out # C5L3_p2_out # C5L3_p3_out;
C5L3 = C5L3_or_out;


--C5L1 is lpm_add_sub:i_rtl_1|addcore:adder[1]|gc[2]~66 at LC16
C5L1_p1_out = add_num[10] & out_link[10];
C5L1_p2_out = E2L4 & add_num[9] & out_link[9];
C5L1_p3_out = E2L4 & E2L5 & add_num[8] & out_link[8];
C5L1_or_out = C5L1_p1_out # C5L1_p2_out # C5L1_p3_out;
C5L1 = C5L1_or_out;


--add_num[11] is add_num[11] at LC15
add_num[11]_p1_out = Load & !out_link[11];
add_num[11]_p2_out = C5L3 & add_num[11] & Load;
add_num[11]_p3_out = !C5L3 & !add_num[11] & Load & !C5L1;
add_num[11]_p4_out = add_num[11] & Load & C5L1;
add_num[11]_or_out = add_num[11]_p2_out # add_num[11]_p3_out # add_num[11]_p4_out;
add_num[11]_reg_input = add_num[11]_p1_out $ add_num[11]_or_out;
add_num[11] = DFFE(add_num[11]_reg_input, GLOBAL(clk), , , );


--out_link[11] is out_link[11] at LC79
out_link[11]_or_out = out_link_link[11];
out_link[11]_reg_input = out_link[11]_or_out;
out_link[11]_p3_out = !Load & !out_link_link[16];
out_link[11] = DFFE(out_link[11]_reg_input, GLOBAL(clk), , , out_link[11]_p3_out);


--C5L7 is lpm_add_sub:i_rtl_1|addcore:adder[1]|tot_cin_node[1]~94 at LC14
C5L7_p0_out = E2L5 & E2L6 & E2L7 & add_num[6] & out_link[6];
C5L7_p1_out = add_num[9] & out_link[9];
C5L7_p2_out = E2L5 & add_num[8] & out_link[8];
C5L7_p3_out = E2L5 & E2L6 & add_num[7] & out_link[7];
C5L7_p4_out = E2L5 & E2L6 & C4L41 & C4L6;
C5L7_or_out = C5L7_p0_out # C5L7_p1_out # C5L7_p2_out # C5L7_p3_out # C5L7_p4_out;
C5L7 = C5L7_or_out;


--add_num[10] is add_num[10] at LC12
add_num[10]_p1_out = Load & !out_link[10] & add_num[10] & !C5L7;
add_num[10]_p2_out = Load & out_link[10] & !add_num[10] & !C5L7;
add_num[10]_p3_out = Load & !out_link[10] & !add_num[10] & C5L7;
add_num[10]_p4_out = Load & out_link[10] & add_num[10] & C5L7;
add_num[10]_or_out = add_num[10]_p1_out # add_num[10]_p2_out # add_num[10]_p3_out # add_num[10]_p4_out;
add_num[10]_reg_input = add_num[10]_or_out;
add_num[10] = DFFE(add_num[10]_reg_input, GLOBAL(clk), , , );


--out_link[10] is out_link[10] at LC78
out_link[10]_or_out = out_link_link[10];
out_link[10]_reg_input = out_link[10]_or_out;
out_link[10]_p3_out = !Load & !out_link_link[16];
out_link[10] = DFFE(out_link[10]_reg_input, GLOBAL(clk), , , out_link[10]_p3_out);


--C5L01 is lpm_add_sub:i_rtl_1|addcore:adder[1]|unreg_res_node[1]~60 at SEXP10
C5L01 = EXP(add_num[9] & out_link[9]);


--C5L11 is lpm_add_sub:i_rtl_1|addcore:adder[1]|unreg_res_node[1]~61 at LC11
C5L11_p1_out = E2L5 & C5L01;
C5L11_p0_out = E2L6 & E2L7 & add_num[6] & out_link[6];
C5L11_p2_out = add_num[8] & out_link[8];
C5L11_p3_out = E2L6 & add_num[7] & out_link[7];
C5L11_p4_out = E2L6 & C4L41 & C4L6;
C5L11_or_out = C5L11_p0_out # C5L11_p2_out # C5L11_p3_out # C5L11_p4_out;
C5L11 = C5L11_p1_out $ C5L11_or_out;


--add_num[9] is add_num[9] at LC10
add_num[9]_p1_out = Load & C5L11;
add_num[9]_or_out = add_num[9]_p1_out;
add_num[9]_reg_input = add_num[9]_or_out;
add_num[9] = DFFE(add_num[9]_reg_input, GLOBAL(clk), , , );


--out_link[9] is out_link[9] at LC92
out_link[9]_or_out = out_link_link[9];
out_link[9]_reg_input = out_link[9]_or_out;
out_link[9]_p3_out = !Load & !out_link_link[16];
out_link[9] = DFFE(out_link[9]_reg_input, GLOBAL(clk), , , out_link[9]_p3_out);


--add_num[8] is add_num[8] at LC9
add_num[8]_p1_out = Load & add_num[8] & !E2L1 & !out_link[8];
add_num[8]_p2_out = Load & add_num[8] & E2L1 & out_link[8];
add_num[8]_p3_out = Load & !add_num[8] & E2L1 & !out_link[8];
add_num[8]_p4_out = Load & !add_num[8] & !E2L1 & out_link[8];
add_num[8]_or_out = add_num[8]_p1_out # add_num[8]_p2_out # add_num[8]_p3_out # add_num[8]_p4_out;
add_num[8]_reg_input = add_num[8]_or_out;
add_num[8] = DFFE(add_num[8]_reg_input, GLOBAL(clk), , , );


--out_link[8] is out_link[8] at LC85
out_link[8]_or_out = out_link_link[8];
out_link[8]_reg_input = out_link[8]_or_out;
out_link[8]_p3_out = !Load & !out_link_link[16];
out_link[8] = DFFE(out_link[8]_reg_input, GLOBAL(clk), , , out_link[8]_p3_out);


--C4L31 is lpm_add_sub:i_rtl_1|addcore:adder[0]|p2c[2]~34 at LC20
C4L31_p1_out = C4L1 & C4L2 & out_link[3] & add_num[3];
C4L31_p2_out = C4L1 & C4L2 & C4L3 & add_num[2] & out_link[2];
C4L31_p3_out = C4L1 & C4L2 & C4L3 & C4L4 & add_num[1] & out_link[1];
C4L31_p4_out = C4L1 & C4L2 & C4L3 & C4L4 & C4L5 & add_num[0] & out_link[0];
C4L31_or_out = C4L31_p1_out # C4L31_p2_out # C4L31_p3_out # C4L31_p4_out;
C4L31 = C4L31_or_out;


--C4L61 is lpm_add_sub:i_rtl_1|addcore:adder[0]|tot_cin_node[6]~11 at LC19
C4L61_p0_out = C4L31 & C4L51;
C4L61_p1_out = add_num[6] & out_link[6];
C4L61_p2_out = add_num[5] & out_link[5] & C4L51;
C4L61_p3_out = add_num[5] & add_num[4] & out_link[4] & C4L51;
C4L61_p4_out = out_link[5] & add_num[4] & out_link[4] & C4L51;
C4L61_or_out = C4L61_p0_out # C4L61_p1_out # C4L61_p2_out # C4L61_p3_out # C4L61_p4_out;
C4L61 = C4L61_or_out;


--add_num[7] is add_num[7] at LC5
add_num[7]_p1_out = Load & out_link[7] & !add_num[7] & !C4L61;
add_num[7]_p2_out = Load & !out_link[7] & add_num[7] & !C4L61;
add_num[7]_p3_out = Load & out_link[7] & add_num[7] & C4L61;
add_num[7]_p4_out = Load & !out_link[7] & !add_num[7] & C4L61;
add_num[7]_or_out = add_num[7]_p1_out # add_num[7]_p2_out # add_num[7]_p3_out # add_num[7]_p4_out;
add_num[7]_reg_input = add_num[7]_or_out;
add_num[7] = DFFE(add_num[7]_reg_input, GLOBAL(clk), , , );


--out_link[7] is out_link[7] at LC55
out_link[7]_or_out = out_link_link[7];
out_link[7]_reg_input = out_link[7]_or_out;
out_link[7]_p3_out = !Load & !out_link_link[16];
out_link[7] = DFFE(out_link[7]_reg_input, GLOBAL(clk), , , out_link[7]_p3_out);


--C4L91 is lpm_add_sub:i_rtl_1|addcore:adder[0]|unreg_res_node[6]~118 at SEXP27
C4L91 = EXP(add_num[6] & out_link[6]);


--C4L02 is lpm_add_sub:i_rtl_1|addcore:adder[0]|unreg_res_node[6]~119 at LC28
C4L02_p1_out = C4L91 & C4L51;
C4L02_p2_out = add_num[5] & out_link[5];
C4L02_p3_out = add_num[5] & add_num[4] & out_link[4];
C4L02_p4_out = out_link[5] & add_num[4] & out_link[4];
C4L02_or_out = C4L31 # C4L02_p2_out # C4L02_p3_out # C4L02_p4_out;
C4L02 = C4L02_p1_out $ C4L02_or_out;


--add_num[6] is add_num[6] at LC40
add_num[6]_p1_out = Load & C4L02;
add_num[6]_or_out = add_num[6]_p1_out;
add_num[6]_reg_input = add_num[6]_or_out;
add_num[6] = DFFE(add_num[6]_reg_input, GLOBAL(clk), , , );


--out_link[6] is out_link[6] at LC114
out_link[6]_or_out = out_link_link[6];