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📄 gw8260.c

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	/* hi = (temp64>>32) & 0xffffffff;	    */	/* lo = temp64 & 0xffffffff;		    */	/* printf("\ntemp64 = 0x%08x%08x", hi, lo); */	hi = (pattern[i]>>32) & 0xffffffff;	lo = pattern[i] & 0xffffffff;	/* printf("\npattern[%d] = 0x%08x%08x", i, hi, lo);  */	if (temp64 != pattern[i]){	    printf ("\n   Data Test Failed, pattern 0x%08x%08x", hi, lo);	    return 1;	}    }    return 0;}#endif /* CFG_DRAM_TEST_DATA */#if defined (CFG_DRAM_TEST_ADDRESS)/*********************************************************************//* NAME:  mem_test_address() -	test address lines		     *//*								     *//* DESCRIPTION:							     *//*   This function performs a test to verify that each word im	     *//*   memory is uniquly addressable. The test sequence is as follows: *//*								     *//*   1) write the address of each word to each word.		     *//*   2) verify that each location equals its address		     *//*								     *//* OUTPUTS:							     *//*   Displays failing test pattern and address			     *//*								     *//* RETURNS:							     *//*   0 -  Passed test						     *//*   1 -  Failed test						     *//*								     *//* RESTRICTIONS/LIMITATIONS:					     *//*								     *//*								     *//*********************************************************************/int mem_test_address(void){    volatile unsigned int * pmem = (volatile unsigned int *)CFG_SDRAM_BASE ;    const unsigned int size = (CFG_SDRAM_SIZE * 1024 * 1024)/4;    unsigned int i;    /* write address to each location */    for ( i = 0; i < size; i++) {	pmem[i] = i;    }    /* verify each loaction */    for ( i = 0; i < size; i++) {	if (pmem[i] != i) {	    printf("\n   Address Test Failed at 0x%x", i);	    return 1;	}    }    return 0;}#endif /* CFG_DRAM_TEST_ADDRESS */#if defined (CFG_DRAM_TEST_WALK)/*********************************************************************//* NAME:   mem_march() -  memory march				     *//*								     *//* DESCRIPTION:							     *//*   Marches up through memory. At each location verifies rmask if   *//*   read = 1. At each location write wmask if	write = 1. Displays  *//*   failing address and pattern.				     *//*								     *//* INPUTS:							     *//*   volatile unsigned long long * base - start address of test	     *//*   unsigned int size - number of dwords(64-bit) to test	     *//*   unsigned long long rmask - read verify mask		     *//*   unsigned long long wmask - wrtie verify mask		     *//*   short read - verifies rmask if read = 1			     *//*   short write  - writes wmask if write = 1			     *//*								     *//* OUTPUTS:							     *//*   Displays failing test pattern and address			     *//*								     *//* RETURNS:							     *//*   0 -  Passed test						     *//*   1 -  Failed test						     *//*								     *//* RESTRICTIONS/LIMITATIONS:					     *//*								     *//*								     *//*********************************************************************/int mem_march(volatile unsigned long long * base,	      unsigned int size,	      unsigned long long rmask,	      unsigned long long wmask,	      short read,	      short write){    unsigned int i;    unsigned long long temp;    unsigned int hitemp, lotemp, himask, lomask;    for (i = 0 ; i < size ; i++) {	if (read != 0) {	    /* temp = base[i]; */	    move64 ((unsigned long long *)&(base[i]), &temp);	    if (rmask != temp) {		hitemp = (temp>>32) & 0xffffffff;		lotemp = temp & 0xffffffff;		himask = (rmask>>32) & 0xffffffff;		lomask = rmask & 0xffffffff;		printf("\n Walking one's test failed: address = 0x%08x,"		       "\n\texpected 0x%08x%08x, found 0x%08x%08x",		       i<<3, himask, lomask, hitemp, lotemp);		return 1;	    }	}	if ( write != 0 ) {	   /*  base[i] = wmask; */	    move64 (&wmask, (unsigned long long *)&(base[i]));	}    }    return 0;}#endif /* CFG_DRAM_TEST_WALK *//*********************************************************************//* NAME:   mem_test_walk() -  a simple walking ones test	     *//*								     *//* DESCRIPTION:							     *//*   Performs a walking ones through entire physical memory. The     *//*   test uses as series of memory marches, mem_march(), to verify   *//*   and write the test patterns to memory. The test sequence is as  *//*   follows:							     *//*     1) march writing 0000...0001				     *//*     2) march verifying 0000...0001  , writing  0000...0010	     *//*     3) repeat step 2 shifting masks left 1 bit each time unitl    *//*	   the write mask equals 1000...0000			     *//*     4) march verifying 1000...0000				     *//*   The test fails if any of the memory marches return a failure.   *//*								     *//* OUTPUTS:							     *//*   Displays which pass on the memory test is executing	     *//*								     *//* RETURNS:							     *//*   0 -  Passed test						     *//*   1 -  Failed test						     *//*								     *//* RESTRICTIONS/LIMITATIONS:					     *//*								     *//*								     *//*********************************************************************/int mem_test_walk(void){    unsigned long long mask;    volatile unsigned long long * pmem =	(volatile unsigned long long *)CFG_SDRAM_BASE ;    const unsigned long size = (CFG_SDRAM_SIZE * 1024 * 1024)/8;    unsigned int i;    mask = 0x01;    printf("Initial Pass");    mem_march(pmem,size,0x0,0x1,0,1);    printf("\b\b\b\b\b\b\b\b\b\b\b\b");    printf("		");    printf("\b\b\b\b\b\b\b\b\b\b\b\b");    for (i = 0 ; i < 63 ; i++) {	printf("Pass %2d", i+2);	if ( mem_march(pmem,size, mask,mask << 1, 1, 1) != 0 ){	    /*printf("mask: 0x%x, pass: %d, ", mask, i);*/	    return 1;	}	mask = mask<<1;	printf("\b\b\b\b\b\b\b");    }    printf("Last Pass");    if (mem_march(pmem, size, 0, mask, 0, 1) != 0) {	/* printf("mask: 0x%x", mask); */	return 1;    }    printf("\b\b\b\b\b\b\b\b\b");    printf("	     ");    printf("\b\b\b\b\b\b\b\b\b");    return 0;}/*********************************************************************//* NAME:    testdram() -  calls any enabled memory tests	     *//*								     *//* DESCRIPTION:							     *//*   Runs memory tests if the environment test variables are set to  *//*   'y'.							     *//*								     *//* INPUTS:							     *//*   testdramdata    - If set to 'y', data test is run.		     *//*   testdramaddress - If set to 'y', address test is run.	     *//*   testdramwalk    - If set to 'y', walking ones test is run	     *//*								     *//* OUTPUTS:							     *//*   None							     *//*								     *//* RETURNS:							     *//*   0 -  Passed test						     *//*   1 -  Failed test						     *//*								     *//* RESTRICTIONS/LIMITATIONS:					     *//*								     *//*								     *//*********************************************************************/int testdram(void){    char *s;    int rundata, runaddress, runwalk;    s = getenv ("testdramdata");    rundata = (s && (*s == 'y')) ? 1 : 0;    s = getenv ("testdramaddress");    runaddress = (s && (*s == 'y')) ? 1 : 0;    s = getenv ("testdramwalk");    runwalk = (s && (*s == 'y')) ? 1 : 0;    if ((rundata == 1) || (runaddress == 1) || (runwalk == 1)) {	printf("Testing RAM ... ");    }#ifdef CFG_DRAM_TEST_DATA    if (rundata == 1) {	if (mem_test_data() == 1){	    return 1;	}    }#endif#ifdef CFG_DRAM_TEST_ADDRESS    if (runaddress == 1) {	if (mem_test_address() == 1){	    return 1;	}    }#endif#ifdef CFG_DRAM_TEST_WALK    if (runwalk == 1) {	if (mem_test_walk() == 1){	    return 1;	}    }#endif    if ((rundata == 1) || (runaddress == 1) || (runwalk == 1)) {	printf("passed");    }    return 0;}#endif /* CFG_DRAM_TEST *//*********************************************************************//* NAME: initdram() -  initializes SDRAM controller		     *//*								     *//* DESCRIPTION:							     *//*   Initializes the MPC8260's SDRAM controller.		     *//*								     *//* INPUTS:							     *//*   CFG_IMMR	    -  MPC8260 Internal memory map		     *//*   CFG_SDRAM_BASE -  Physical start address of SDRAM		     *//*   CFG_PSDMR -       SDRAM mode register			     *//*   CFG_MPTPR -       Memory refresh timer prescaler register	     *//*   CFG_SDRAM0_SIZE - SDRAM size				     *//*								     *//* RETURNS:							     *//*   SDRAM size in bytes					     *//*								     *//* RESTRICTIONS/LIMITATIONS:					     *//*								     *//*								     *//*********************************************************************/long int initdram(int board_type){    volatile immap_t *immap  = (immap_t *)CFG_IMMR;    volatile memctl8260_t *memctl = &immap->im_memctl;    volatile uchar c = 0, *ramaddr = (uchar *)(CFG_SDRAM_BASE + 0x8);    ulong psdmr = CFG_PSDMR;    int i;    /*     * Quote from 8260 UM (10.4.2 SDRAM Power-On Initialization, 10-35):     *     * "At system reset, initialization software must set up the     *	programmable parameters in the memory controller banks registers     *	(ORx, BRx, P/LSDMR). After all memory parameters are configured,     *	system software should execute the following initialization sequence     *	for each SDRAM device.     *     *	1. Issue a PRECHARGE-ALL-BANKS command     *	2. Issue eight CBR REFRESH commands     *	3. Issue a MODE-SET command to initialize the mode register     *     *	The initial commands are executed by setting P/LSDMR[OP] and     *	accessing the SDRAM with a single-byte transaction."     *     * The appropriate BRx/ORx registers have already been set when we     * get here. The SDRAM can be accessed at the address CFG_SDRAM_BASE.     */    memctl->memc_psrt = CFG_PSRT;    memctl->memc_mptpr = CFG_MPTPR;    memctl->memc_psdmr = psdmr | PSDMR_OP_PREA;    *ramaddr = c;    memctl->memc_psdmr = psdmr | PSDMR_OP_CBRR;    for (i = 0; i < 8; i++){	*ramaddr = c;    }    memctl->memc_psdmr = psdmr | PSDMR_OP_MRW;    *ramaddr = c;    memctl->memc_psdmr = psdmr | PSDMR_OP_NORM | PSDMR_RFEN;    *ramaddr = c;    /* return total ram size */    return (CFG_SDRAM0_SIZE * 1024 * 1024);}/*********************************************************************//*			   End of gw8260.c			     *//*********************************************************************/

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