sdram_init.c

U BOOT源码

/*
 * (C) Copyright 2001
 * Josh Huber <[e-mail]>, Mission Critical Linux, Inc.
 *
 * See file CREDITS for list of people who contributed to this
 * project.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License as
 * published by the Free Software Foundation; either version 2 of
 * the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
 * MA 02111-1307 USA
 */

/* sdram_init.c - automatic memory sizing */

#include <common.h>
#include <74xx_7xx.h>
#include <galileo/memory.h>
#include <galileo/pci.h>
#include <galileo/gt64260R.h>
#include <net.h>

#include "eth.h"
#include "mpsc.h"
#include "i2c.h"
#include "64260.h"

/* #define	DEBUG */
#define	MAP_PCI

#ifdef DEBUG
#define DP(x) x
#else
#define DP(x)
#endif

#define GB         (1 << 30)

/* structure to store the relevant information about an sdram bank */
typedef struct sdram_info {
	uchar drb_size;
	uchar registered, ecc;
	uchar tpar;
	uchar tras_clocks;
	uchar burst_len;
	uchar banks, slot;
	int size;	/* detected size, not from I2C but from dram_size() */
} sdram_info_t;

#ifdef DEBUG
void dump_dimm_info(struct sdram_info *d)
{
    static const char *ecc_legend[]={""," Parity"," ECC"};
    printf("dimm%s %sDRAM: %dMibytes:\n",
	    ecc_legend[d->ecc],
	    d->registered?"R":"",
	    (d->size>>20));
    printf("  drb=%d tpar=%d tras=%d burstlen=%d banks=%d slot=%d\n",
	    d->drb_size, d->tpar, d->tras_clocks, d->burst_len,
	    d->banks, d->slot);
}
#endif

static int
memory_map_bank(unsigned int bankNo,
		unsigned int bankBase,
		unsigned int bankLength)
{
#ifdef DEBUG
	if (bankLength > 0) {
		printf("mapping bank %d at %08x - %08x\n",
		       bankNo, bankBase, bankBase + bankLength - 1);
	} else {
		printf("unmapping bank %d\n", bankNo);
	}
#endif

	memoryMapBank(bankNo, bankBase, bankLength);

	return 0;
}

#ifdef MAP_PCI
static int
memory_map_bank_pci(unsigned int bankNo,
		unsigned int bankBase,
		unsigned int bankLength)
{
	PCI_HOST host;
	for (host=PCI_HOST0;host<=PCI_HOST1;host++) {
		const int features=
			PREFETCH_ENABLE |
			DELAYED_READ_ENABLE |
			AGGRESSIVE_PREFETCH |
			READ_LINE_AGGRESSIVE_PREFETCH |
			READ_MULTI_AGGRESSIVE_PREFETCH |
			MAX_BURST_4 |
			PCI_NO_SWAP;

		pciMapMemoryBank(host, bankNo, bankBase, bankLength);

		pciSetRegionSnoopMode(host, bankNo, PCI_SNOOP_WB, bankBase,
				bankLength);

		pciSetRegionFeatures(host, bankNo, features, bankBase, bankLength);
	}
	return 0;
}
#endif

/* ------------------------------------------------------------------------- */

/* much of this code is based on (or is) the code in the pip405 port */
/* thanks go to the authors of said port - Josh */


/*
 * translate ns.ns/10 coding of SPD timing values
 * into 10 ps unit values
 */
static inline unsigned short
NS10to10PS(unsigned char spd_byte)
{
	unsigned short ns, ns10;

	/* isolate upper nibble */
	ns = (spd_byte >> 4) & 0x0F;
	/* isolate lower nibble */
	ns10 = (spd_byte & 0x0F);

	return(ns*100 + ns10*10);
}

/*
 * translate ns coding of SPD timing values
 * into 10 ps unit values
 */
static inline unsigned short
NSto10PS(unsigned char spd_byte)
{
	return(spd_byte*100);
}

#ifdef CONFIG_ZUMA_V2
static int
check_dimm(uchar slot, sdram_info_t *info)
{
	/* assume 2 dimms, 2 banks each 256M - we dont have an
	 * dimm i2c so rely on the detection routines later */

	memset(info, 0, sizeof(*info));

	info->slot = slot;
	info->banks = 2;	/* Detect later */
	    info->registered = 0;
	info->drb_size = 32;	/* 16 - 256MBit, 32 - 512MBit
				   but doesn't matter, both do same
				   thing in setup_sdram() */
	    info->tpar = 3;
	    info->tras_clocks = 5;
	    info->burst_len = 4;
#ifdef CONFIG_ECC
	info->ecc = 0;		/* Detect later */
#endif /* CONFIG_ECC */
	return 0;
}

#elif defined(CONFIG_P3G4)

static int
check_dimm(uchar slot, sdram_info_t *info)
{
	memset(info, 0, sizeof(*info));

	if (slot)
		return 0;

	info->slot = slot;
	info->banks = 1;
	info->registered = 0;
	info->drb_size = 4;
	info->tpar = 3;
	info->tras_clocks = 6;
	info->burst_len = 4;
#ifdef CONFIG_ECC
	info->ecc = 2;
#endif
	return 0;
}

#else /* ! CONFIG_ZUMA_V2 && ! CONFIG_P3G4*/

/* This code reads the SPD chip on the sdram and populates
 * the array which is passed in with the relevant information */
static int
check_dimm(uchar slot, sdram_info_t *info)
{
	DECLARE_GLOBAL_DATA_PTR;
	uchar addr = slot == 0 ? DIMM0_I2C_ADDR : DIMM1_I2C_ADDR;
	int ret;
	uchar rows, cols, sdram_banks, supp_cal, width, cal_val;
	ulong tmemclk;
	uchar trp_clocks, trcd_clocks;
	uchar data[128];

	get_clocks ();

	tmemclk = 1000000000 / (gd->bus_clk / 100);  /* in 10 ps units */

#ifdef CONFIG_EVB64260_750CX
	if (0 != slot) {
		printf("check_dimm: The EVB-64260-750CX only has 1 DIMM,");
		printf("            called with slot=%d insetad!\n", slot);
		return 0;
	}
#endif
	DP(puts("before i2c read\n"));

	ret = i2c_read(addr, 0, 128, data, 0);

	DP(puts("after i2c read\n"));

	/* zero all the values */
	memset(info, 0, sizeof(*info));

	if (ret) {
		DP(printf("No DIMM in slot %d [err = %x]\n", slot, ret));
		return 0;
	}

	/* first, do some sanity checks */
	if (data[2] != 0x4) {
		printf("Not SDRAM in slot %d\n", slot);
		return 0;
	}

	/* get various information */
	rows = data[3];
	cols = data[4];
	info->banks = data[5];
	sdram_banks = data[17];
	width = data[13] & 0x7f;

	DP(printf("sdram_banks: %d, banks: %d\n", sdram_banks, info->banks));

	/* check if the memory is registered */
	if (data[21] & (BIT1 | BIT4))
		info->registered = 1;

#ifdef CONFIG_ECC
	/* check for ECC/parity [0 = none, 1 = parity, 2 = ecc] */
	info->ecc = (data[11] & 2) >> 1;
#endif

	/* bit 1 is CL2, bit 2 is CL3 */
	supp_cal = (data[18] & 0x6) >> 1;

	/* compute the relevant clock values */
	trp_clocks = (NSto10PS(data[27])+(tmemclk-1)) / tmemclk;
	trcd_clocks = (NSto10PS(data[29])+(tmemclk-1)) / tmemclk;
	info->tras_clocks = (NSto10PS(data[30])+(tmemclk-1)) / tmemclk;

	DP(printf("trp = %d\ntrcd_clocks = %d\ntras_clocks = %d\n",
		  trp_clocks, trcd_clocks, info->tras_clocks));

	/* try a CAS latency of 3 first... */
	cal_val = 0;
	if (supp_cal & 3) {
		if (NS10to10PS(data[9]) <= tmemclk)
			cal_val = 3;
	}

	/* then 2... */
	if (supp_cal & 2) {
		if (NS10to10PS(data[23]) <= tmemclk)
			cal_val = 2;
	}

	DP(printf("cal_val = %d\n", cal_val));

	/* bummer, did't work... */
	if (cal_val == 0) {
		DP(printf("Couldn't find a good CAS latency\n"));
		return 0;
	}

	/* get the largest delay -- these values need to all be the same
	 * see Res#6 */
	info->tpar = cal_val;
	if (trp_clocks > info->tpar)
		info->tpar = trp_clocks;
	if (trcd_clocks > info->tpar)
		info->tpar = trcd_clocks;

	DP(printf("tpar set to: %d\n", info->tpar));

#ifdef CFG_BROKEN_CL2
	if (info->tpar == 2){
		info->tpar = 3;
		DP(printf("tpar fixed-up to: %d\n", info->tpar));
	}
#endif
	/* compute the module DRB size */
	info->drb_size = (((1 << (rows + cols)) * sdram_banks) * width) / _16M;

	DP(printf("drb_size set to: %d\n", info->drb_size));

	/* find the burst len */
	info->burst_len = data[16] & 0xf;
	if ((info->burst_len & 8) == 8) {
		info->burst_len = 1;
	} else if ((info->burst_len & 4) == 4) {
		info->burst_len = 0;
	} else {
		return 0;
	}