📄 startu32.lst
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A51 MACRO ASSEMBLER STARTU32 03/28/2006 09:48:44 PAGE 1
MACRO ASSEMBLER A51 V8.00
OBJECT MODULE PLACED IN STARTU32.OBJ
ASSEMBLER INVOKED BY: C:\Keil\C51\BIN\A51.EXE STARTU32.A51 SET(LARGE) DEBUG EP
LOC OBJ LINE SOURCE
1 $nomod51
2 ;------------------------------------------------------------------------------
3 ; Startu32.a51
4 ;
5 ; Version:
6 ; September 2004 Version 0.7 - Removed code that disables the DDC SRAM as it is
7 ; disabled by default upon reset.
8 ; July 2004 Version 0.6 - Comments edited, added note about DDC SRAM related to
9 ; date code.
10 ; June 2004 Version 0.5 - Comments edited, code to disable DDC SRAM corrected.
11 ; Dependencies: None
12 ;
13 ;
14 ; Description:
15 ; This code is executed after a reset. Besides the usual C51 startup
16 ; settings, other uPSD Turbo initializations can be added here. When
17 ; the startup code execution is complete, this code jumps to C_START that is
18 ; typically the main() function in the C code.
19 ;
20 ; Notes:
21 ; - Watchdog timer is disabled - should be enabled at beginning of user's code
22 ; - DDC and its RAM is disabled
23 ; - Various IP prescalers are set to large values (lowers power consumption)
24 ; The IP device drivers must initialize the prescalers appropriately.
25 ;
26 ; Copyright (c) 2004 STMicroelectronics Inc.
27 ;
28 ; This example demo code is provided as is and has no warranty,
29 ; implied or otherwise. You are free to use/modify any of the provided
30 ; code at your own risk in your applications with the expressed limitation
31 ; of liability (see below) so long as your product using the code contains
32 ; at least one uPSD product (device).
33 ;
34 ; LIMITATION OF LIABILITY: NEITHER STMicroelectronics NOR ITS VENDORS OR
35 ; AGENTS SHALL BE LIABLE FOR ANY LOSS OF PROFITS, LOSS OF USE, LOSS OF DATA,
36 ; INTERRUPTION OF BUSINESS, NOR FOR INDIRECT, SPECIAL, INCIDENTAL OR
37 ; CONSEQUENTIAL DAMAGES OF ANY KIND WHETHER UNDER THIS AGREEMENT OR
38 ; OTHERWISE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
39 ;------------------------------------------------------------------------------
40
41
42 ; User-defined Power-On Initialization of Memory (Clear Memory)
43 ;
44 ; With the following EQU statements the initialization of memory
45 ; at processor reset can be defined:
46
47 ; ; the absolute start-address of IDATA memory is always 0
0100 48 IDATALEN EQU 100H ; the length of IDATA memory in bytes.
49
50 ; *** NOTE: uPSD users need to fill in the following based on where SRAM memory mapped.
51
0000 52 XDATASTART EQU 0H ; the absolute start-address of XDATA memory
0000 53 XDATALEN EQU 0H ; the length of XDATA memory in bytes.
54
0000 55 PDATASTART EQU 0H ; the absolute start-address of PDATA memory
0000 56 PDATALEN EQU 0H ; the length of PDATA memory in bytes.
57
58 ; Notes: The IDATA space overlaps physically the DATA and BIT areas of the
A51 MACRO ASSEMBLER STARTU32 03/28/2006 09:48:44 PAGE 2
59 ; 8051 CPU. At minimum the memory space occupied from the C51
60 ; run-time routines must be set to zero.
61
62
63 ;------------------------------------------------------------------------------
64 ;
65 ; Reentrant Stack Initilization
66 ;
67 ; The following EQU statements define the stack pointer for reentrant
68 ; functions and initialized it:
69 ;
70 ; Stack Space for reentrant functions in the SMALL model.
0000 71 IBPSTACK EQU 0 ; set to 1 if small reentrant is used.
0100 72 IBPSTACKTOP EQU 0FFH+1 ; set top of stack to highest location+1.
73 ;
74 ; Stack Space for reentrant functions in the LARGE model.
0000 75 XBPSTACK EQU 0 ; set to 1 if large reentrant is used.
0000 76 XBPSTACKTOP EQU 0FFFFH+1; set top of stack to highest location+1.
77 ;
78 ; Stack Space for reentrant functions in the COMPACT model.
0000 79 PBPSTACK EQU 0 ; set to 1 if compact reentrant is used.
0000 80 PBPSTACKTOP EQU 0FFFFH+1; set top of stack to highest location+1.
81 ;
82 ;------------------------------------------------------------------------------
83 ;
84 ; Page Definition for Using the Compact Model with 64 KByte xdata RAM
85 ;
86 ; The following EQU statements define the xdata page used for pdata
87 ; variables. The EQU PPAGE must conform with the PPAGE control used
88 ; in the linker invocation.
89 ;
0000 90 PPAGEENABLE EQU 0 ; set to 1 if pdata object are used.
91 ;
0000 92 PPAGE EQU 0 ; define PPAGE number.
93 ;
00A0 94 PPAGE_SFR DATA 0A0H ; SFR that supplies uppermost address byte
95 ; (most 8051 variants use P2 as uppermost address byte)
96 ;
97 ;------------------------------------------------------------------------------
98
99 ; Standard SFR Symbols
00E0 100 ACC DATA 0E0H
00F0 101 B DATA 0F0H
0081 102 SP DATA 81H
0082 103 DPL DATA 82H
0083 104 DPH DATA 83H
00AE 105 WDKEY DATA 0AEH
0095 106 ASCL DATA 095H
00B1 107 PSCL0L DATA 0B1H
00B2 108 PSCL0H DATA 0B2H
00B3 109 PSCL1L DATA 0B3H
00B4 110 PSCL1H DATA 0B4H
00E1 111 USCL DATA 0E1H
00D7 112 DDCCON DATA 0D7H
00D8 113 S1CON DATA 0D8H
114
115 NAME ?C_STARTUP
116
117
118 ?C_C51STARTUP SEGMENT CODE
119 ?STACK SEGMENT IDATA
120
---- 121 RSEG ?STACK
0000 122 DS 1
123
124 EXTRN CODE (?C_START)
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