fapiao.sum

用keil开发的.单片机税控器程序.单片机用的是AT公司的.upsd3245

***********************************************************************
                         PSDsoft Express Version 8.50
                         Summary of Design Assistant
***********************************************************************
PROJECT    : fapiao                        DATE : 03/24/2006
DEVICE     : uPSD3254A                     TIME : 10:35:30
MCU/DSP    : uPSD32XX    
***********************************************************************

Initial setting for Program and Data Space:
===========================================

  Main PSD flash memory will reside in this space at power-up:      Program Space Only
  Secondary PSD flash memory will reside in this space at power-up: Program Space Only

Pin Definitions:
================

Pin          Signal                    Pin
Name         Name                      Type
------------ ------------------------- ------------
pa7          PeriphDIR                 External chip select - Active-Lo
pa6          KEYCS                     External chip select - Active-Lo
pa5          VCC_O                     GP I/O mode 
pa4          MotoOn                    GP I/O mode 
pa3          Fast_paper_feed           GP I/O mode 
pa2          Black_mark_out            GP I/O mode 
pa1          R_pulse_out               GP I/O mode 
pa0          T_pulse_out               GP I/O mode 
pb7          USBHOSTCS                 External chip select - Active-Lo
pb6          PeriphCE                  External chip select - Active-Lo
pb5          LCDDI                     Combinatorial
pb4          LCDWR                     Combinatorial
pb3          LCDE                      Combinatorial
pb2          LCDCS3                    Combinatorial
pb1          LCDCS2                    Combinatorial
pb0          LCDCS1                    Combinatorial
pc7          Go_paper                  GP I/O mode 
tdo          tdo                       Dedicated JTAG - TDO
tdi          tdi                       Dedicated JTAG - TDI
pc4          pc4                       GP I/O mode 
pc3          pc3                       GP I/O mode 
pc2          pc2                       GP I/O mode 
tck          tck                       Dedicated JTAG - TCK
tms          tms                       Dedicated JTAG - TMS
pd2          pd2                       GP I/O mode 
pd1          pd1                       GP I/O mode 
ale          ale                       ALE output  
p4.7         p4_7                      GP I/O mode 
p4.6         MOSI                      GP I/O mode 
p4.5         MISO                      GP I/O mode 
p4.4         SCL                       GP I/O mode 
p4.3         PCO4                      GP I/O mode 
p4.2         PCO3                      GP I/O mode 
p4.1         PCO2                      GP I/O mode 
p4.0         PCO1                      GP I/O mode 
p3.7         COMCS1                    GP I/O mode 
p3.6         SDA                       GP I/O mode 
p3.5         Flash_busy                GP I/O mode 
p3.4         ICINT                     GP I/O mode 
p3.3         USBINIT                   GP I/O mode 
p3.2         PWRINIT                   GP I/O mode 
p3.1         TXT0                      UART1 TxD   
p3.0         RXD0                      UART1 RxD   
p1.7         ICCTR2                    GP I/O mode 
p1.6         ICRST2                    GP I/O mode 
p1.5         ICCTR1                    GP I/O mode 
p1.4         ICRST1                    GP I/O mode 
p1.3         TXD1                      UART2 TxD   
p1.2         RXD1                      UART2 RxD   
p1.1         PrintCS                   GP I/O mode 
p1.0         PrintEN                   GP I/O mode 
a11          a11                       Address line
a10          a10                       Address line
a9           a9                        Address line
a8           a8                        Address line
ad7          a7                        Data/Address line
ad6          a6                        Data/Address line
ad5          a5                        Data/Address line
ad4          a4                        Data/Address line
ad3          a3                        Data/Address line
ad2          a2                        Data/Address line
ad1          a1                        Data/Address line
ad0          a0                        Data/Address line
_Reset_In    _Reset_In                 Reset In    
Vref         VREF                      VREF input  
_rd          _rd                       Bus control output
_psen        _psen                     Bus control output
_wr          _wr                       Bus control output
USB-         USB_minus                 USB- bus    
USB+         USB_plus                  USB+ bus    
Xtal1        Xtal1                     Xtal1       
Xtal2        Xtal2                     Xtal2       

User defined nodes:
===================

None defined

Page Register settings:
=======================

pgr0 is used for paging
pgr1 is used for paging
pgr2 is used for paging
pgr3 is not used
pgr4 is not used
pgr5 is not used
pgr6 is not used
pgr7 is not used

Equations:
==========

rs0 = ((address >= ^h0300) & (address <= ^h7FFF));
csiop = ((address >= ^h0200) & (address <= ^h02FF));
fs0 = ((page == 0) & (address >= ^h8000) & (address <= ^hFFFF));
fs1 = ((page == 1) & (address >= ^h8000) & (address <= ^hFFFF));
fs2 = ((page == 2) & (address >= ^h8000) & (address <= ^hFFFF));
fs3 = ((page == 3) & (address >= ^h8000) & (address <= ^hFFFF));
fs4 = ((page == 4) & (address >= ^h8000) & (address <= ^hFFFF));
fs5 = ((page == 5) & (address >= ^h8000) & (address <= ^hFFFF));
fs6 = ((page == 6) & (address >= ^h8000) & (address <= ^hFFFF));
fs7 = ((page == 7) & (address >= ^h8000) & (address <= ^hFFFF));
csboot0 = ((address >= ^h0000) & (address <= ^h1FFF));
csboot1 = ((address >= ^h2000) & (address <= ^h3FFF));
csboot2 = ((address >= ^h4000) & (address <= ^h5FFF));
csboot3 = ((address >= ^h6000) & (address <= ^h7FFF));
! PeriphDIR = ((address >= ^h8000) & (address <= ^hE800) & (!_rd));
! KEYCS = ((address >= ^hE00C) & (address <= ^hE00C) & (!_rd));
! USBHOSTCS = ((address >= ^hE000) & (address <= ^hE000) & (!_rd))
     # ((address >= ^hE000) & (address <= ^hE000) & (!_wr))
     # ((address >= ^hE800) & (address <= ^hE800) & (!_wr));
! PeriphCE = ((address >= ^h8000) & (address <= ^hE800) & (!_rd))
     # ((!_wr));
LCDDI = a8&a15&a13&!a14;
LCDDI.oe = Vcc;
LCDWR = a9&a15&a13&!a14;
LCDWR.oe = Vcc;
LCDE = a15&a13&!a14&!(_rd&_wr);
LCDE.oe = Vcc;
LCDCS3 = !(!a10&!a11&a12&a15&a13&!a14);
LCDCS3.oe = Vcc;
LCDCS2 = !(!a0&a11&!a12&a13&!a14&a15);
LCDCS2.oe = Vcc;
LCDCS1 = !(a10&!a11&!a12&a13&!a14&a15);
LCDCS1.oe = Vcc;