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📄 fapiao.lbk

📁 用keil开发的.单片机税控器程序.单片机用的是AT公司的.upsd3245
💻 LBK
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Current project is: 'fapiao'

AHDL2BLF  ABEL-HDL Processor
PSDabel-CPLD 6.20 Copyright 1983-1994 Data I/O Corp. All Rights Reserved.
Module: 'fapiao'

  Processing equations...............

  Module parsing complete. Building logic network...

  Creating Berkeley PLA file fapiao.tt1...

Module 'fapiao' processing complete.

Using backup JHD file.
AHDL2BLF complete - 0 errors, 0 warnings. Time: 1 seconds

AHDL2BLF  ABEL-HDL Processor
PSDabel-CPLD 6.20 Copyright 1983-1994 Data I/O Corp. All Rights Reserved.
Module: 'fapiao'

  Processing equations...............

  Module parsing complete. Building logic network...

  Creating Berkeley PLA file fapiao.tt1...

Module 'fapiao' processing complete.

Using backup JHD file.
AHDL2BLF complete - 0 errors, 0 warnings. Time: 1 seconds

BLIFOPT  Open-ABEL Optimizer 
U.C. Berkeley, SIS Ver. 1.0, modified by Data I/O Corp.
PSDabel-CPLD 6.20 Copyright 1983-1994 Data I/O Corp. All Rights Reserved.
Reading Open-ABEL (PLA) file fapiao.tt1...
Performing 'bypin choose' optimization...
Shortening signal names...
Writing signal name cross reference file fapiao.xrf... 
Writing Open-ABEL (PLA) file fapiao.tt2...

BLIFOPT complete - 0 errors, 0 warnings. Time: 1 seconds

DIOFFT  Flip-Flop Transformation program
PSDabel-CPLD 6.20 Copyright 1983-1994 Data I/O Corp. All Rights Reserved.
Input file: fapiao.tt2.
Output file: fapiao.tt3.


DIOFFT complete. - Time 0 seconds

PSD Fitter - Logic Synthesis and Device Fitting
PSDsoft Express 8.50 Copyright (C) 1993-2005 STMicroelectronics, Inc.  All Rights Reserved.
PROJECT    : fapiao                           DATE : 03/24/2006
DEVICE     : uPSD3254A                        TIME : 09:29:54
FIT OPTION : Keep Current
  >> PSD Fitter complete - Successful Fitting
  >> View fitter report for detail
PSD Address Translation - Merge MCU Firmware with PSD 
PSDsoft Express 8.50 Copyright (C) 1993-2005 STMicroelectronics, Inc.  All Rights Reserved.
PROJECT    : fapiao                                   DATE : 03/24/2006
DEVICE     : uPSD3254A                                TIME : 09:30:18
  >> 
  >> Warning ADR002: No data file has been specified for FS6.
  >> Warning ADR002: No data file has been specified for FS7.
  >> Address Translation complete.
  >> 
PSD Address Translation - Merge MCU Firmware with PSD 
PSDsoft Express 8.50 Copyright (C) 1993-2005 STMicroelectronics, Inc.  All Rights Reserved.
PROJECT    : fapiao                                   DATE : 03/24/2006
DEVICE     : uPSD3254A                                TIME : 09:43:03
  >> 
  >> Warning ADR002: No data file has been specified for FS6.
  >> Warning ADR002: No data file has been specified for FS7.
  >> Address Translation complete.
  >> 
PSD Address Translation - Merge MCU Firmware with PSD 
PSDsoft Express 8.50 Copyright (C) 1993-2005 STMicroelectronics, Inc.  All Rights Reserved.
PROJECT    : fapiao                                   DATE : 03/24/2006
DEVICE     : uPSD3254A                                TIME : 09:52:09
  >> 
  >> Warning ADR002: No data file has been specified for FS6.
  >> Warning ADR002: No data file has been specified for FS7.
  >> Address Translation complete.
  >> 
AHDL2BLF  ABEL-HDL Processor
PSDabel-CPLD 6.20 Copyright 1983-1994 Data I/O Corp. All Rights Reserved.
Module: 'fapiao'

  Processing equations...............

  Module parsing complete. Building logic network...

  Creating Berkeley PLA file fapiao.tt1...

Module 'fapiao' processing complete.

Using backup JHD file.
AHDL2BLF complete - 0 errors, 0 warnings. Time: 1 seconds

AHDL2BLF  ABEL-HDL Processor
PSDabel-CPLD 6.20 Copyright 1983-1994 Data I/O Corp. All Rights Reserved.
Module: 'fapiao'

  Processing equations...............

  Module parsing complete. Building logic network...

  Creating Berkeley PLA file fapiao.tt1...

Module 'fapiao' processing complete.

Using backup JHD file.
AHDL2BLF complete - 0 errors, 0 warnings. Time: 2 seconds

BLIFOPT  Open-ABEL Optimizer 
U.C. Berkeley, SIS Ver. 1.0, modified by Data I/O Corp.
PSDabel-CPLD 6.20 Copyright 1983-1994 Data I/O Corp. All Rights Reserved.
Reading Open-ABEL (PLA) file fapiao.tt1...
Performing 'bypin choose' optimization...
Shortening signal names...
Writing signal name cross reference file fapiao.xrf... 
Writing Open-ABEL (PLA) file fapiao.tt2...

BLIFOPT complete - 0 errors, 0 warnings. Time: 1 seconds

DIOFFT  Flip-Flop Transformation program
PSDabel-CPLD 6.20 Copyright 1983-1994 Data I/O Corp. All Rights Reserved.
Input file: fapiao.tt2.
Output file: fapiao.tt3.


DIOFFT complete. - Time 0 seconds

PSD Fitter - Logic Synthesis and Device Fitting
PSDsoft Express 8.50 Copyright (C) 1993-2005 STMicroelectronics, Inc.  All Rights Reserved.
PROJECT    : fapiao                           DATE : 03/24/2006
DEVICE     : uPSD3254A                        TIME : 10:03:58
FIT OPTION : Keep Current
  >> PSD Fitter complete - Successful Fitting
  >> View fitter report for detail
PSD Address Translation - Merge MCU Firmware with PSD 
PSDsoft Express 8.50 Copyright (C) 1993-2005 STMicroelectronics, Inc.  All Rights Reserved.
PROJECT    : fapiao                                   DATE : 03/24/2006
DEVICE     : uPSD3254A                                TIME : 10:04:17
  >> 
  >> Warning ADR002: No data file has been specified for FS6.
  >> Warning ADR002: No data file has been specified for FS7.
  >> Address Translation complete.
  >> 
AHDL2BLF  ABEL-HDL Processor
PSDabel-CPLD 6.20 Copyright 1983-1994 Data I/O Corp. All Rights Reserved.
Module: 'fapiao'

  Processing equations...............

  Module parsing complete. Building logic network...

  Creating Berkeley PLA file fapiao.tt1...

Module 'fapiao' processing complete.

Using backup JHD file.
AHDL2BLF complete - 0 errors, 0 warnings. Time: 1 seconds

AHDL2BLF  ABEL-HDL Processor
PSDabel-CPLD 6.20 Copyright 1983-1994 Data I/O Corp. All Rights Reserved.
Module: 'fapiao'

  Processing equations...............

  Module parsing complete. Building logic network...

  Creating Berkeley PLA file fapiao.tt1...

Module 'fapiao' processing complete.

Using backup JHD file.
AHDL2BLF complete - 0 errors, 0 warnings. Time: 1 seconds

BLIFOPT  Open-ABEL Optimizer 
U.C. Berkeley, SIS Ver. 1.0, modified by Data I/O Corp.
PSDabel-CPLD 6.20 Copyright 1983-1994 Data I/O Corp. All Rights Reserved.
Reading Open-ABEL (PLA) file fapiao.tt1...
Performing 'bypin choose' optimization...
Shortening signal names...
Writing signal name cross reference file fapiao.xrf... 
Writing Open-ABEL (PLA) file fapiao.tt2...

BLIFOPT complete - 0 errors, 0 warnings. Time: 1 seconds

DIOFFT  Flip-Flop Transformation program
PSDabel-CPLD 6.20 Copyright 1983-1994 Data I/O Corp. All Rights Reserved.
Input file: fapiao.tt2.
Output file: fapiao.tt3.


DIOFFT complete. - Time 0 seconds

PSD Fitter - Logic Synthesis and Device Fitting
PSDsoft Express 8.50 Copyright (C) 1993-2005 STMicroelectronics, Inc.  All Rights Reserved.
PROJECT    : fapiao                           DATE : 03/24/2006
DEVICE     : uPSD3254A                        TIME : 10:08:18
FIT OPTION : Keep Current
  >> PSD Fitter complete - Successful Fitting
  >> View fitter report for detail
PSD Address Translation - Merge MCU Firmware with PSD 
PSDsoft Express 8.50 Copyright (C) 1993-2005 STMicroelectronics, Inc.  All Rights Reserved.
PROJECT    : fapiao                                   DATE : 03/24/2006
DEVICE     : uPSD3254A                                TIME : 10:08:36
  >> 
  >> Warning ADR002: No data file has been specified for FS6.
  >> Warning ADR002: No data file has been specified for FS7.
  >> Address Translation complete.
  >> 
AHDL2BLF  ABEL-HDL Processor
PSDabel-CPLD 6.20 Copyright 1983-1994 Data I/O Corp. All Rights Reserved.
Module: 'fapiao'

  Processing equations...............

  Module parsing complete. Building logic network...

  Creating Berkeley PLA file fapiao.tt1...

Module 'fapiao' processing complete.

Using backup JHD file.
AHDL2BLF complete - 0 errors, 0 warnings. Time: 1 seconds

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