initiator_negotiate_sw.c

基于FAS466的SCSI控制器的启动器模式的C源代码。

 #define	GLB extern	

#include <stdio.h>
#include <conio.h>
#include <sys\types.h>
#include <sys\timeb.h>
#include <time.h>
#include <stdlib.h>
#include <string.h>
#include <dos.h>

#include "fas466defs.h"
#include "fas466regs.h"
#include "fas466globalvars.h"


void Initiator_Negotiate_sw()

{




		RegWrite ( SC_FIFO, 0x80 ); //
		RegWrite ( SC_Command ,SC_CMD_Select_With_ATN_Stop_Seq ); //
		ExpCmdCmptStat = SC_Function_Complete;	
		Cmd_Complete466();

			RegWrite ( SC_FIFO, 0x01);// ;  extended message
			RegWrite ( SC_FIFO, 0x02);//  ;  length to follow
			RegWrite ( SC_FIFO, 0x03);//  ;  Wide negotiation
			RegWrite ( SC_FIFO, xfer_width);//  ;  transfer xfer_width

		  if (xfer_width == 1) { printf ("\n Wide Negotiation begins "); }
		  if (xfer_width == 0) { printf ("\n Narrow Negotiation begins "); }

		RegWrite (SC_Command ,SC_CMD_Xfer_Information_Non_DMA ); // :=
		ExpCmdCmptStat = SC_Function_Complete | SC_Bus_Service;;	
		Cmd_Complete466();

		// receive the extended message back
		RegWrite (SC_Command ,SC_CMD_Xfer_Information_Non_DMA ); // :=
		ExpCmdCmptStat = SC_Function_Complete;	
		Cmd_Complete466();
		RegWrite ( SC_Command, SC_CMD_Message_Accepted); // =
		ExpCmdCmptStat = SC_Function_Complete;	
		Cmd_Complete466();

		printf ("\n FIFO content : %x", RegRead (SC_FIFO));

		 // receive length to follow message back
		RegWrite (SC_Command ,SC_CMD_Xfer_Information_Non_DMA ); // :=
		ExpCmdCmptStat = SC_Function_Complete;	
		Cmd_Complete466();
		RegWrite ( SC_Command, SC_CMD_Message_Accepted); // =
		ExpCmdCmptStat = SC_Function_Complete;	
		Cmd_Complete466();

		printf ("\n FIFO content : %x", RegRead (SC_FIFO));

		  // receive the wide message back
		RegWrite (SC_Command ,SC_CMD_Xfer_Information_Non_DMA ); // :=
		ExpCmdCmptStat = SC_Function_Complete;	
		Cmd_Complete466();
		RegWrite ( SC_Command, SC_CMD_Message_Accepted); // =
		ExpCmdCmptStat = SC_Function_Complete;	
		Cmd_Complete466();

		printf ("\n FIFO content : %x",RegRead (SC_FIFO) );

		RegWrite (SC_Command ,SC_CMD_Xfer_Information_Non_DMA ); // :=
		ExpCmdCmptStat = SC_Function_Complete;	
		Cmd_Complete466();

		if (xfer_period_factor != 0)   //  Command Assert ATN work around
			{

			printf ("\n SC Control before ATN %x", RegRead (SC_SCSI_Control) );
            RegWrite(SC_SCSI_Control, 0x2800);
			printf ("\n SC Control after ATN %x", RegRead (SC_SCSI_Control) );

			}

		  // receive the xfer_width message back
		RegWrite ( SC_Command, SC_CMD_Message_Accepted); // =
		xfer_width = RegRead (SC_FIFO);
		printf ("\n xfer_width : %x", xfer_width);

		if (xfer_period_factor == 0) goto TUR;
		ExpCmdCmptStat = SC_Function_Complete | SC_Bus_Service;;	
		Cmd_Complete466();

			RegWrite ( SC_FIFO,0x1 ); //  SC_FIFO := #01 ;  sync negotiation
			RegWrite ( SC_FIFO,0x3); //  SC_FIFO := #03 ;  length to follow
			RegWrite ( SC_FIFO,0x1 ); //  SC_FIFO := #01 ;  sync negotiation
			RegWrite ( SC_FIFO,xfer_period_factor ); //  SC_FIFO := period ;  transfer period
			RegWrite ( SC_FIFO,req_ack_offset ); //  SC_FIFO := offset ;  req/ack offset

		RegWrite (SC_Command ,SC_CMD_Xfer_Information_Non_DMA ); // :=
		ExpCmdCmptStat = SC_Function_Complete | SC_Bus_Service;;	
		Cmd_Complete466();


		// receive the extended message back
		RegWrite (SC_Command ,SC_CMD_Xfer_Information_Non_DMA ); // :=
		ExpCmdCmptStat = SC_Function_Complete ;	
		Cmd_Complete466();
		RegWrite ( SC_Command, SC_CMD_Message_Accepted); // =
		ExpCmdCmptStat = SC_Function_Complete;	
		Cmd_Complete466();
		
		printf ("\n FIFO content : %x", RegRead (SC_FIFO));

		 // receive length to follow message back
		RegWrite (SC_Command ,SC_CMD_Xfer_Information_Non_DMA ); // :=
		ExpCmdCmptStat = SC_Function_Complete ;	
		Cmd_Complete466();
		RegWrite ( SC_Command, SC_CMD_Message_Accepted); // =
		ExpCmdCmptStat = SC_Function_Complete;	
		Cmd_Complete466();
		
		printf ("\n FIFO content : %x", RegRead (SC_FIFO));

		  // receive the wide message back
		RegWrite (SC_Command ,SC_CMD_Xfer_Information_Non_DMA ); // :=
		ExpCmdCmptStat = SC_Function_Complete ;	
		Cmd_Complete466();
		RegWrite ( SC_Command, SC_CMD_Message_Accepted); // =
		ExpCmdCmptStat = SC_Function_Complete;	
		Cmd_Complete466();

		printf ("\n FIFO content : %x",RegRead (SC_FIFO) );

		RegWrite (SC_Command ,SC_CMD_Xfer_Information_Non_DMA ); // :=
		ExpCmdCmptStat = SC_Function_Complete ;	
		Cmd_Complete466();
		RegWrite ( SC_Command, SC_CMD_Message_Accepted);
		xfer_period_factor = RegRead (SC_FIFO);
		printf ("\n Period Answered : %x", xfer_period_factor);
		ExpCmdCmptStat = SC_Function_Complete ;	
		Cmd_Complete466();

		RegWrite (SC_Command ,SC_CMD_Xfer_Information_Non_DMA );
		ExpCmdCmptStat = SC_Function_Complete ;	
		Cmd_Complete466();
		RegWrite ( SC_Command, SC_CMD_Message_Accepted);
		req_ack_offset = RegRead (SC_FIFO);
		printf ("\n Offset Answer : %x", req_ack_offset);
 TUR:
		ExpCmdCmptStat = SC_Function_Complete | SC_Bus_Service;;	
		Cmd_Complete466();
 

			RegWrite (SC_FIFO ,0x0); // TUR
			RegWrite (SC_FIFO ,0x0);
			RegWrite (SC_FIFO ,0x0);
			RegWrite (SC_FIFO ,0x0);
			RegWrite (SC_FIFO ,0x0);
			RegWrite (SC_FIFO ,0x0);
		RegWrite (SC_Command ,SC_CMD_Xfer_Information_Non_DMA );
		ExpCmdCmptStat = SC_Function_Complete | SC_Bus_Service;;	
		Cmd_Complete466();

		printf ("\n TUR "); 
		RegWrite (SC_Command ,01 );

		RegWrite ( SC_Command, SC_CMD_Xfer_Information_Non_DMA ); // receive status byte
		ExpCmdCmptStat = SC_Function_Complete | SC_Bus_Service;;	
		Cmd_Complete466();
		SC_Status = RegRead (SC_FIFO);


		RegWrite (SC_Command ,SC_CMD_Xfer_Information_Non_DMA );
		ExpCmdCmptStat = SC_Function_Complete;	
		Cmd_Complete466();

		RegWrite ( SC_Command, SC_CMD_Message_Accepted);
		ExpCmdCmptStat = SC_Function_Complete | SC_SCSI_Disconnect;	
		Cmd_Complete466();


		 RegWrite(SC_Almost_Empty_FIFO_Threshold , 0x14);                    // change AF_FE 
		 RegWrite(SC_Selection_Configuration1 , 0x00);                    // Reset setup before change 
        RegWrite(SC_Selection_Configuration1 , SC_Selection_ID0) ;   //target ID 0
		 
if (xfer_width == 0)  {

  BitMask (SC_Selection_Configuration1, (req_ack_offset * 0x100),set );

	  if (xfer_period_factor == 10)	 {
  BitMask (SC_Selection_Configuration1, SC_Narrow_Fast40_Sync_25ns, set) ;
	printf ("'Narrow Fast 40' ");
	  } 

	 if (xfer_period_factor == 12)  {
  BitMask (SC_Selection_Configuration1,  SC_Narrow_Ultra_Sync_50ns, set) ;
  printf (" 'Narrow Fast 20'");
	  } 

	 if (xfer_period_factor == 25)  {
  BitMask (SC_Selection_Configuration1, 0x40, set) ;
  printf ("'Narrow Fast 10' ");
	  } 

	 if (xfer_period_factor == 50)  {
  BitMask (SC_Selection_Configuration1, 0x20, set)  ;
  printf ("'Narrow Fast 5' ");
	  } 
		 if (xfer_period_factor == 0)  {
  RegWrite (SC_Selection_Configuration1, 0x7)  ;
  printf ("'Narrow Asynch' ");
	  }
	 }  


	 if (xfer_width == 1)  {

  BitMask (SC_Selection_Configuration1, (req_ack_offset * 0x100),set );

	  if (xfer_period_factor == 10)	 {
	BitMask (SC_Selection_Configuration1, SC_Wide_Fast40_Sync_25ns, set) ;
  	RegWrite(SC_Almost_Empty_FIFO_Threshold , 0x20);                    // change AF_FE 
	printf ("Wide  Fast 40  - AF_AE up ");
	  } 

	 if (xfer_period_factor == 12)  {
  BitMask (SC_Selection_Configuration1,  SC_Wide_Ultra_Sync_50ns, set) ;
  printf (" 'Wide  Fast 20'");
	  } 

	 if (xfer_period_factor == 25)  {
  BitMask (SC_Selection_Configuration1, 0x50, set) ;
  printf ("'Wide  Fast 10' ");
	  } 

	 if (xfer_period_factor == 50)  {
  BitMask (SC_Selection_Configuration1, 0x30, set)  ;
  printf ("'Wide  Fast 5' ");
	  } 
		 if (xfer_period_factor == 0)  {
  RegWrite (SC_Selection_Configuration1, 0x17)  ;
  printf ("'Wide  Asynch' ");
	  }
	 }  
	printf ("SC_Selection_Configuration1 = %X \n ", RegRead (SC_Selection_Configuration1) );
	Wait (100); 	
	RegWrite (SC_Command ,0x01 );  // flush FIFO
	if (SC_Status == 02) 
			Initiator_Mode_req_sen ();

}