fas466regs.h

基于FAS466的SCSI控制器的启动器模式的C源代码。

	#define	SC_Single_Ended_Configuration		 0x24 		// Single Ended Configuration R/W Register
	#define	SC_SCSI_Pad_Configuration2			 0x25 		// SCSI Pad Configuration 0x2 R/W Register
	#define	SC_Selection_Configuration2		 0x26 		// Selection Configuration 0x2 Low R/W Register
	#define	SC_Command								 0x20 		// Command R/W Register
	#define	SC_Command_Interrupt_Status				 0x21 	// Command Interrupt Status R/W Register
	#define	SC_Scaling								 0x22 	// Scaling R/W Register
	#define	SC_SCSI_Pad_Configuration1				 0x23 	// SCSI Pad Configuration 0x1 R/W Register
	#define	SC_Command_Status						 0x04 	// Command Status R Register
	#define	SC_Error_Interrupt_Status				 0x05 	// Error Interrupt Status R/W register
	#define	SC_SCSI_Data							 0x06 	// SCSI Data Low R/W register
	#define	SC_SCSI_Control							 0x08 	// SCSI Control low R/W register
	#define	SC_FIFO									 0x0A 	// FIFO Data R/W register
	#define	SC_FIFO_Count							 0x0B 	// FIFO Count R register
	#define	SC_Block_Size							 0x0C 	// Block Size Low R/W register
	#define	SC_Block_Size_Counter					 0x0E 	// Block Size Counter Low R register
	#define	SC_Almost_Full_FIFO_Threshold			 0x10 	// Almost Full FIFO Threshold R/W register
	#define	SC_Almost_Empty_FIFO_Threshold			 0x11 	// Almost Empty FIFO Threshold R/W register
	#define	SC_Block_Count_Counter					 0x12 	// Block Count Counter Low R/W register
	#define	SC_SCSI_Arbitration_Configuration		 0x14 	// SCSI Arbitration Configuration Low R/W register
	#define	SC_Selection_Configuration1				 0x16 	// Selection Configuration 0x1 Low R/W register
	#define	SC_SCSI_CDB_Configuration				 0x18 	// SCDI CDB configuration low R/W register
	#define	SC_Selection_Disable					 0x1A 	// Selection Disable R/W register
	#define	SC_Miscellaneous_Configuration			 0x1B 	// Miscellaneous Configuration R/W register
	#define	SC_Probe_Address						 0x1C 	// Probe Address R/W register
	#define	SC_Probe_Data							 0x1D 	// Probe Data R/W register
	#define	SC_Write_Command_Status_Test			 0x1E 	// Write Command Status Test W Register
	#define	SC_Write_Error_Interrupt_Status_Test	 0x1F 	// Write Error Interrupt Status Test W register
	#define 	SC_Sync_Control							 0x2c
	#define	SC_SCSI_Output_Enable_Control			 0x2d
	#define	MC_Control_Status							 0x40 			//control/status r/w
	#define	MC_External_Interupt_Mask					 0x41 			//External Interupt Mask r/w
	#define	MC_Address_Pointer							 0x42 			//Address Pointer r/w
	#define	MC_Internal_Register_Access					 0x44 			//Internal Register Access r/w
	#define	MC_Program_Memory_Byte_Access				 0x45 			//Program Memory Byte Access r/w
	#define	MC_Indirect_DMA_Word_Count					 0x46 			//Indirect DMA Word Count r/w
	#define	MC_External_Interupt_Status					 0x47 			//External Interupt Status r/w
	#define	MC_Interrupt_Parameter						 0x48 		//Interupt Parameter r/w
	#define	MC_Firmware_Interrupt						 0x49 		//Firmware Interrupt r/w
	#define	MC_Hardware_Semaphore_request_grant			 0x4A 		//Hardware Semaphore Request/Grant r/w
	#define	MC_Hardware_Semaphore_Release				 0x4B 		//Hardware Semaphore Release w
	#define	MC_Indirect_DMA_Index						 0x4C 		//Indirect DMA Index LSB r/w
	//#define	MC_Program_Memory_Word_Access				 0x12E 		//Program Memory Word Access r/w
	#define	MC_Mailbox_register0						 0x50 		//Mailbox Registers r/w
	#define	MC_Mailbox_register1						 0x51 		//Mailbox Registers r/w
	#define	MC_Mailbox_register2						 0x52 		//Mailbox Registers r/w
	#define	MC_Mailbox_register3						 0x53 		//Mailbox Registers r/w
	#define	MC_Mailbox_register4						 0x54 	//Mailbox Registers r/w
	#define	MC_Mailbox_register5						 0x55 		//Mailbox Registers r/w
	#define	MC_Mailbox_register6						 0x56 		//Mailbox Registers r/w
	#define	MC_Mailbox_register7						 0x57 		//Mailbox Registers r/w
	#define	MC_Mailbox_register8						 0x58 		//Mailbox Registers r/w
	#define	MC_Mailbox_register9						 0x59 		//Mailbox Registers r/w
	#define	MC_Mailbox_register10						 0x5A 		//Mailbox Registers r/w
	#define	MC_Mailbox_register11						 0x5B 		//Mailbox Registers r/w
	#define	MC_Mailbox_register12						 0x5C 		//Mailbox Registers r/w
	#define	MC_Mailbox_register13						 0x5D 		//Mailbox Registers r/w
	#define	MC_Mailbox_register14						 0x5E 		//Mailbox Registers r/w
	#define	MC_Mailbox_register15						 0x5F 	//Mailbox Registers r/w
	#define	MC_Mailbox_register16						 0x60 		//Mailbox Registers r/w
	#define	MC_Mailbox_register17						 0x61 		//Mailbox Registers r/w
	#define	MC_Mailbox_register18						 0x62 		//Mailbox Registers r/w
	#define	MC_Mailbox_register19						 0x63 		//Mailbox Registers r/w
	#define	MC_Mailbox_register20						 0x64 		//Mailbox Registers r/w
	#define	MC_Mailbox_register21						 0x65 	//Mailbox Registers r/w
	#define	MC_Mailbox_register22						 0x66 		//Mailbox Registers r/w
	#define	MC_Mailbox_register23						 0x67 		//Mailbox Registers r/w
	#define	MC_Mailbox_register24						 0x68 		//Mailbox Registers r/w
	#define	MC_Mailbox_register25						 0x69 		//Mailbox Registers r/w
	#define	MC_Mailbox_register26						 0x6A 		//Mailbox Registers r/w
	#define	MC_Mailbox_register27						 0x6B 		//Mailbox Registers r/w
	#define	MC_Mailbox_register28						 0x6C 		//Mailbox Registers r/w
	#define	MC_Mailbox_register29						 0x6D 		//Mailbox Registers r/w
	#define	MC_Mailbox_register30						 0x6E 		//Mailbox Registers r/w
	#define	MC_Mailbox_register31						 0x6F 		//Mailbox Registers r/w
	#define	MC_Diagnostic_Test_Register1				 0x70 	//Diagnostic Test Registers r/w
	#define	MC_Diagnostic_Test_Register2				 0x71 	//Diagnostic Test Registers r/w
	#define	MC_General_Purpose_IO_Congig_Register		 0x72
	#define	DI_Configuration					 	 0x3C
	#define	DI_Interrupt_Status					 0x3D
	#define	DI_Status							 0x3F
	#define	MP_Chip_Config						 0x00
	#define 	MP_Module_Reset						 0x33
	#define	MP_Gen_PurposeIO_Config					 0x72
	#define	MP_Version							 0x32
	#define	MP_Mode_Select						 0x34
	#define	MP_uP_Interface_Config					 0x36
	#define	MP_Indirect_Reg_Access_isa				 0x38
	#define	MP_Indirect_Reg_Access_Pointer			 0x39