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📄 initiator_mode_wr.c

📁 基于FAS466的SCSI控制器的启动器模式的C源代码。
💻 C
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#define	GLB extern

#include <stdio.h>
#include <conio.h>
#include <sys\types.h>
#include <sys\timeb.h>
#include <time.h>
#include <stdlib.h>
#include <string.h>
#include <dos.h>

#include "fas466defs.h"
#include "fas466regs.h"
#include "fas466globalvars.h"

void Initiator_Mode_wr()
{
		unsigned long Word_Cnt = 0;
		unsigned short tempval;
		unsigned short Temp_data = 0;
		unsigned char FIFOCount = 0;

        printf("  Set Up to Send Data  \n");

	
    RegWrite(SC_FIFO , 0x80) ;  // msg1
	RegWrite(SC_FIFO , 0xa) ;  // cdb1
	RegWrite(SC_FIFO , 0x0) ;  // cdb2
	RegWrite(SC_FIFO , 0x0) ;  // cdb3
	RegWrite(SC_FIFO , 0x0) ;  // cdb4
    RegWrite(SC_FIFO , BlockCnt); // cdb5
	RegWrite(SC_FIFO , 0x0) ;  // cdb6


        verify (SC_FIFO_Count , 0x7) ;
		printf("      Issue SelWAtn Command (1 messages)\n");
        RegWrite(SC_Command , SC_CMD_Select1_With_ATN_Seq) ;
		ExpCmdCmptStat = SC_Function_Complete;
		Cmd_Complete466();
        verifym(SC_SCSI_Control, SC_CTRL_PhaseMask , SC_CTRL_DataOutPhase) ;
        verify (SC_FIFO_Count , 0x0 );

 	printf("    Set Up to Send Data\n");

		// Setup Buffer #2
		//    SetChkMem(2, ((BlockSize * BlockCnt)+ 1), 0x55, 0, 0); //set pattern
		// Configure DMA Controller to receive data
	Word_Cnt = ((BlockCnt * BlockSize) / 0x2)  ;

	IsaWrite((unsigned short) RAM_ADDR_LO, (unsigned short) (Word_Cnt & 0x0FF));
	IsaWrite((unsigned short) RAM_ADDR_HI, (unsigned short) ((Word_Cnt & 0xFF00) >> 8));
	tempval = IsaRead((unsigned short) EVAL_CONFIG);
	IsaWrite((unsigned short) EVAL_CONFIG, (unsigned short) (tempval | Load_Counter));
	IsaWrite((unsigned short) EVAL_CONFIG, tempval);

    IsaWrite((unsigned short) EVAL_CONFIG, (unsigned short) (tempval | Send_Data));
	 

// Set up the SCSI Controller

	RegWrite(SC_Block_Size , BlockSize) ;
	RegWrite(SC_Block_Count_Counter , 0xFFFF) ;   //  BlockCnt (target controls data length)
	RegWrite(SC_Command , SC_CMD_Xfer_Information_DMA );
		ExpCmdCmptStat =  SC_Bus_Service;	 //SC_Function_Complete |
		Cmd_Complete466();
        verifym(SC_Command_Status, 0xff ,0x0) ;
        verifym(SC_SCSI_Control,0xfffc , SC_CTRL_StatusPhase | SC_REQ | SC_EIGS) ;
		Temp_data = IsaRead((unsigned short) RAM_ADDR_LO);
		Temp_data |= (IsaRead((unsigned short) RAM_ADDR_HI) << 8);
		if (Temp_data == 0)
			verify (SC_FIFO_Count , 0 );
		else { 
			Temp_data = (( ~Temp_data & 0x0000ffff )+ 1) * 2;
			//verify (SC_FIFO_Count,Temp_data);
		}
		RegWrite(SC_Command , SC_CMD_Flush_FIFO);
        verifym(SC_FIFO_Count,0xff , 0x0) ;  //fifo should be empty

//-------------------------------------------------------------------------------
	printf("      Receive Status & msg / Disco \n");
//-------------------------------------------------------------------------------

		RegWrite(SC_Command , SC_CMD_Xfer_Information_Non_DMA) ;     // receive status byte
		ExpCmdCmptStat = SC_Function_Complete | SC_Bus_Service;	
		Cmd_Complete466();

        verifym(SC_SCSI_Control ,  SC_CTRL_PhaseMask, SC_CTRL_MsgInPhase) ;
        verify (SC_FIFO_Count , 0x1) ;
        verifym(SC_FIFO, 0xff, 0x0) ;  // status

        
        RegWrite(SC_Command , SC_CMD_Xfer_Information_Non_DMA) ;     // receive message byte
		ExpCmdCmptStat = SC_Function_Complete; 	
		Cmd_Complete466();
         
        verifym(SC_SCSI_Control ,  SC_CTRL_PhaseMask,  SC_CTRL_MsgInPhase) ;
        verify (SC_FIFO_Count , 0x1) ;
        verifym(SC_FIFO , 0xff,  0x0) ;  // msg

		RegWrite(SC_Command , SC_CMD_Message_Accepted) ;
		ExpCmdCmptStat = SC_Function_Complete | SC_SCSI_Disconnect;	
		Cmd_Complete466();
		
		RegWrite(SC_Command , SC_CMD_Enable_Selection_Reslection);
        verifym(SC_SCSI_Control, SC_CTRL_PhaseMask, SC_CTRL_BusFreePhase) ;

}

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