aic23.c

用DSP5410实现对音乐文件音量的限制性调节

/*
 *  Copyright 2003 by Texas Instruments Incorporated.
 *  All rights reserved. Property of Texas Instruments Incorporated.
 *  Restricted rights to use, duplicate or disclose this code are
 *  granted through contract.
 *  
 */
/* "@(#) DDK 1.11.00.00 11-04-03 (ddk-b13)" */
/*
 *  ======== aic23.c ========
 *
 *  AIC23 codec driver implementation specific to the
 *  Spectrum Digital DSK5510 board.
 */
 
#include <aic23.h>

#include <csl.h>
#include <csl_mcbsp.h>

static void aic23Rset(MCBSP_Handle hMcbsp, Uint16 regnum, Uint16 regval);

/* CSL handle to the McBSP1. The McBSP is used as the control channel in SPI*/
static MCBSP_Config mcbspCfg1 = {
    MCBSP_SPCR1_RMK(
        MCBSP_SPCR1_DLB_OFF,                   /* DLB      = 0 */
        MCBSP_SPCR1_RJUST_RZF,                 /* RJUST    = 0 */
        MCBSP_SPCR1_CLKSTP_NODELAY,            /* CLKSTP   = 1 */
        MCBSP_SPCR1_DXENA_NA,                  /* DXENA    = 0 */
        MCBSP_SPCR1_ABIS_DISABLE,              /* ABIS     = 0 */
        MCBSP_SPCR1_RINTM_RRDY,                /* RINTM    = 0 */
        0,                                     /* RSYNCER  = 0 */
        0,                                     /* RFULL    = 0 */
        0,                                     /* RRDY     = 0 */
        MCBSP_SPCR1_RRST_DISABLE               /* RRST     = 0 */
    ),
    MCBSP_SPCR2_RMK(
        MCBSP_SPCR2_FREE_NO,                   /* FREE     = 0 */
        MCBSP_SPCR2_SOFT_YES,                  /* SOFT     = 1 */
        MCBSP_SPCR2_FRST_RESET,                /* FRST     = 0 */
        MCBSP_SPCR2_GRST_RESET,                /* GRST     = 0 */
        MCBSP_SPCR2_XINTM_XRDY,                /* XINTM    = 0 */
        0,                                     /* XSYNCER  = 0 */
        0,                                     /* XEMPTY   = 0 */
        0,                                     /* XRDY     = 0 */
        MCBSP_SPCR2_XRST_DISABLE               /* XRST     = 0 */
    ),
    MCBSP_RCR1_RMK(
        MCBSP_RCR1_RFRLEN1_OF(0),              /* RFRLEN1  = 0 */
        MCBSP_RCR1_RWDLEN1_8BIT                /* RWDLEN1  = 0 */
    ),
    MCBSP_RCR2_RMK(
        MCBSP_RCR2_RPHASE_SINGLE,              /* RPHASE   = 0 */
        MCBSP_RCR2_RFRLEN2_OF(0),              /* RFRLEN2  = 0 */
        MCBSP_RCR2_RWDLEN2_8BIT,               /* RWDLEN2  = 0 */
        MCBSP_RCR2_RCOMPAND_MSB,               /* RCOMPAND = 0 */
        MCBSP_RCR2_RFIG_YES,                   /* RFIG     = 0 */
        MCBSP_RCR2_RDATDLY_0BIT                /* RDATDLY  = 0 */
    ),
    MCBSP_XCR1_RMK(
        MCBSP_XCR1_XFRLEN1_OF(0),              /* XFRLEN1  = 1 */
        MCBSP_XCR1_XWDLEN1_16BIT               /* XWDLEN1  = 2 */
    ),
    MCBSP_XCR2_RMK(
        MCBSP_XCR2_XPHASE_SINGLE,              /* XPHASE   = 0 */
        MCBSP_XCR2_XFRLEN2_OF(0),              /* XFRLEN2  = 0 */
        MCBSP_XCR2_XWDLEN2_8BIT,               /* XWDLEN2  = 0 */
        MCBSP_XCR2_XCOMPAND_MSB,               /* XCOMPAND = 0 */
        MCBSP_XCR2_XFIG_YES,                   /* XFIG     = 0 */
        MCBSP_XCR2_XDATDLY_0BIT                /* XDATDLY  = 0 */
    ),
    MCBSP_SRGR1_RMK(
        MCBSP_SRGR1_FWID_OF(0),                /* FWID     = 0 */
        MCBSP_SRGR1_CLKGDV_OF(63)              /* CLKGDV   = 63 */
    ),
    MCBSP_SRGR2_RMK(
        MCBSP_SRGR2_GSYNC_FREE,                /* FREE     = 0 */
        MCBSP_SRGR2_CLKSP_RISING,              /* CLKSP    = 0 */
        MCBSP_SRGR2_CLKSM_INTERNAL,            /* CLKSM    = 1 */
        MCBSP_SRGR2_FSGM_DXR2XSR,              /* FSGM     = 0 */
        MCBSP_SRGR2_FPER_OF(13)                /* FPER     = 13 */
    ),
    MCBSP_MCR1_DEFAULT,
    MCBSP_MCR2_DEFAULT,
    MCBSP_PCR_RMK(
        MCBSP_PCR_IDLEEN_RESET,                /* IDLEEN   = 0 */
        MCBSP_PCR_XIOEN_SP,                    /* XIOEN    = 0 */
        MCBSP_PCR_RIOEN_GPIO,                  /* RIOEN    = 1 */
        MCBSP_PCR_FSXM_INTERNAL,               /* FSXM     = 1 */
        MCBSP_PCR_FSRM_EXTERNAL,               /* FSRM     = 0 */
        MCBSP_PCR_SCLKME_NO,                   /* SCLKME   = 0 */
        0,                                     /* CLKSSTAT = 0 */
        0,                                     /* DXSTAT   = 0 */
        0,                                     /* DRSTAT   = 0 */
        MCBSP_PCR_CLKXM_OUTPUT,                /* CLKXM    = 1 */
        MCBSP_PCR_CLKRM_INPUT,                 /* CLKRM    = 0 */
        MCBSP_PCR_FSXP_ACTIVELOW,              /* FSXP     = 1 */
        MCBSP_PCR_FSRP_ACTIVEHIGH,             /* FSRP     = 0 */
        MCBSP_PCR_CLKXP_FALLING,               /* CLKXP    = 1 */
        MCBSP_PCR_CLKRP_FALLING                /* CLKRP    = 0 */
    ),
    MCBSP_RCERA_DEFAULT,
    MCBSP_RCERB_DEFAULT,
    MCBSP_RCERC_DEFAULT,
    MCBSP_RCERD_DEFAULT,
    MCBSP_RCERE_DEFAULT,
    MCBSP_RCERF_DEFAULT,
    MCBSP_RCERG_DEFAULT,
    MCBSP_RCERH_DEFAULT,
    MCBSP_XCERA_DEFAULT,
    MCBSP_XCERB_DEFAULT,
    MCBSP_XCERC_DEFAULT,
    MCBSP_XCERD_DEFAULT,
    MCBSP_XCERE_DEFAULT,
    MCBSP_XCERF_DEFAULT,
    MCBSP_XCERG_DEFAULT,
    MCBSP_XCERH_DEFAULT
};

/*
 *  ======== AIC23_setParams ========
 *
 *  This function takes a pointer to the object of type AIC23_Params,
 *  and writes all 11 control words found in it to the codec. Prior
 *  to that it initializes the codec if this is the first time the
 *  function is ever called.
 *  The 16-bit word is composed of register address in the upper 7 bits
 *  and the 9-bit register value stored in the parameters structure.
 */
Int AIC23_setParams(AIC23_Params *params)
{
    Int i;
    MCBSP_Handle hMcbsp;

    /* open and configure McBSPs */
    hMcbsp = MCBSP_open(MCBSP_PORT1, MCBSP_OPEN_RESET);

    if (hMcbsp == INV) {
        return FALSE;
    }
    
    MCBSP_config(hMcbsp, &mcbspCfg1);

    /*
     *  Initialize the AIC23 codec
     */

    /* Start McBSP1 as the codec control channel */
    MCBSP_start(hMcbsp, MCBSP_XMIT_START |
        MCBSP_SRGR_START | MCBSP_SRGR_FRAMESYNC, 100);
    
    /* Reset the AIC23 */
    aic23Rset(hMcbsp, AIC23_RESET, 0);
    
    /* Assign each register */
    for (i = 0; i < AIC23_NUMREGS; i++) {
        aic23Rset(hMcbsp, i, params->regs[i]);
    }
    return TRUE;
}


/*
 *  ======== aic23Rset ========
 *  Set codec register regnum to value regval
 */
static Void aic23Rset(MCBSP_Handle hMcbsp, Uint16 regnum, Uint16 regval)
{
    /* Mask off lower 9 bits */
    regval &= 0x1ff;
    
    /* Wait for XRDY signal before writing data to DXR */
    while (!MCBSP_xrdy(hMcbsp));
    
    /* Write 16 bit data value to DXR */
    MCBSP_write16(hMcbsp, (regnum << 9) | regval);
}