chufa1.vhd

微机接口实验程序 。。 。。 。。 。。 。。 。。 。。

--chu fa kongzhi 


library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;



entity chufa1 is
 port(
        clk:    in std_logic;   --CHU FA SOURCE CHOOSE     
        WAY1:   in std_logic;   
        WAY2:   in std_logic;
        WAY3:   in std_logic;
        CHUFA: OUT STD_LOGIC --CHU FA ENABLE
      );
END CHUFA1;       


architecture CHUFA1 of CHUFA1 is
                          
       signal A:STD_LOGIC_VECTOR (0 TO 2) :="000";

            begin
              process              
                BEGIN
                   wait until CLK'event and CLK ='0' ;  
                      
                        if A=2 THEN
                            A<="000";
                            ELSE 
                           IF A=0 THEN
                            A<=A+1;
                          ELSIF A=1 THEN
                            A<=A+1;
                            end IF;
                        END IF;
                  End process;
                      
              PROCESS 
                 BEGIN
                 IF A=2 THEN
                   CHUFA<=WAY3;
                 ELSIF A=1 THEN
                   CHUFA<=WAY2;
                  ELSIF A=0 THEN
                    CHUFA<=WAY1;
                  END IF;
               END PROCESS;
END CHUFA1;