📄 adenable.fit
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-- MAX+plus II Compiler Fit File
-- Version 10.2 07/10/2002
-- Compiled: 03/28/2006 17:04:34
-- Copyright (C) 1988-2002 Altera Corporation
-- Any megafunction design, and related net list (encrypted or decrypted),
-- support information, device programming or simulation file, and any other
-- associated documentation or information provided by Altera or a partner
-- under Altera's Megafunction Partnership Program may be used only to
-- program PLD devices (but not masked PLD devices) from Altera. Any other
-- use of such megafunction design, net list, support information, device
-- programming or simulation file, or any other related documentation or
-- information is prohibited for any other purpose, including, but not
-- limited to modification, reverse engineering, de-compiling, or use with
-- any other silicon devices, unless such use is explicitly licensed under
-- a separate agreement with Altera or a megafunction partner. Title to
-- the intellectual property, including patents, copyrights, trademarks,
-- trade secrets, or maskworks, embodied in any such megafunction design,
-- net list, support information, device programming or simulation file, or
-- any other related documentation or information provided by Altera or a
-- megafunction partner, remains with Altera, the megafunction partner, or
-- their respective licensors. No other licenses, including any licenses
-- needed under any third party's intellectual property, are provided herein.
CHIP "adenable"
BEGIN
DEVICE = "EP910ILC-12";
"AD1" : INPUT_PIN = 43 ;
"AD2" : INPUT_PIN = 42 ;
"AD3" : INPUT_PIN = 41 ;
"AD4" : INPUT_PIN = 27 ;
"AD5" : INPUT_PIN = 26 ;
"AD6" : INPUT_PIN = 25 ;
"AD7" : INPUT_PIN = 21 ;
"AD8" : INPUT_PIN = 20 ;
"AD9" : INPUT_PIN = 19 ;
"AD10" : INPUT_PIN = 5 ;
"AD11" : INPUT_PIN = 4 ;
"AD12" : INPUT_PIN = 3 ;
"clk" : INPUT_PIN = 2 ;
"ADOUT" : OUTPUT_PIN = 18 ; -- LC24
"LED0" : OUTPUT_PIN = 16 ; -- LC23
"LED1" : OUTPUT_PIN = 15 ; -- LC22
"LED2" : OUTPUT_PIN = 14 ; -- LC21
"LED3" : OUTPUT_PIN = 13 ; -- LC20
"|LPM_ADD_SUB:107|addcore:adder|addcore:adder0|result_node1" : LOCATION = LC13 ; -- PIN 6
"|LPM_ADD_SUB:107|addcore:adder|addcore:adder0|result_node2" : LOCATION = LC14 ; -- PIN 7
"|LPM_ADD_SUB:107|addcore:adder|addcore:adder0|result_node3" : LOCATION = LC15 ; -- PIN 8
"|LPM_ADD_SUB:107|addcore:adder|addcore:adder0|~245~1" : LOCATION = LC12 ; -- PIN 28
":24" : LOCATION = LC16 ; -- PIN 9 -- I0
":25" : LOCATION = LC17 ; -- PIN 10 -- I1
":26" : LOCATION = LC18 ; -- PIN 11 -- I2
":27" : LOCATION = LC19 ; -- PIN 12 -- I3
"~611~1" : LOCATION = LC11 ; -- PIN 29
"~611~2" : LOCATION = LC10 ; -- PIN 30
"~611~3" : LOCATION = LC9 ; -- PIN 31
"~611~4" : LOCATION = LC8 ; -- PIN 32
"~611~5" : LOCATION = LC7 ; -- PIN 33
"~611~6" : LOCATION = LC6 ; -- PIN 34
END;
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