adenable.vhd

微机接口实验程序 。。 。。 。。 。。 。。 。。 。。

--AD ENABLE

library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;

entity ADENABLE is
 port(
       clk:   in std_logic;     
	   ADOUT:OUT STD_LOGIC;
       AD1:   in std_logic;  --AD clock    20MHZ
       AD2:   in std_logic;   --AD clock    10MHZ
       AD3:  in std_logic;   --AD CLOCK    5MHZ
       AD4:  in std_logic;   --AD CLOCK    2MHZ
       AD5:  in std_logic;   --AD CLOCK    1MHZ
       AD6:  in std_logic;   --AD CLOCK    500KHZ        
       AD7:  in std_logic;   --AD CLOCK    200KHZ
       AD8:  in std_logic;   --AD CLOCK    100KHZ
       AD9:  in std_logic;   --AD CLOCK    50KHZ
       AD10: in std_logic;   --AD CLOCK    20KHZ
       AD11: in std_logic;   --AD CLOCK    10KHZ
       AD12: in std_logic;    --AD CLOCK    1KHZ
      
       LED:  OUT STD_LOGIC_VECTOR(0 TO 3) -- LED LIGHT

       );
end ADENABLE;
      
    architecture ADENABLE of ADENABLE is
            begin
         process(CLK)                 
           variable I:std_logic_vector (0 to 3):="0001";                 
            begin 
                 if CLK'event and CLK ='1'   THEN
                    IF I="1100" THEN
                       I:="0001"; 
                    ELSE
                       I:=I+1;
                    END IF; 
                CASE I IS 
                   	WHEN "0001"=> ADOUT<= AD1; LED<="0001";
                   	WHEN "0010"=> ADOUT<= AD2; LED<="0010";
					WHEN "0011"=> ADOUT<= AD3; LED<="0011";
					WHEN "0100"=> ADOUT<= AD4; LED<="0100";
					WHEN "0101"=> ADOUT<= AD5; LED<="0101";
					WHEN "0110"=> ADOUT<= AD6; LED<="0110";
					WHEN "0111"=> ADOUT<= AD7; LED<="0111";
					WHEN "1001"=> ADOUT<= AD8; LED<="1001";
					WHEN "1010"=> ADOUT<= AD9; LED<="1001";
					WHEN "1011"=> ADOUT<= AD10; LED<="1010";
					WHEN "1100"=> ADOUT<= AD11; LED<="1011";
					WHEN "1101"=> ADOUT<= AD12; LED<="1101";
				    WHEN OTHERS=> ADOUT<=AD2; LED<="0000";
                 END CASE;


                 END IF;
           END PROCESS;
             
 END ADENABLE;