pm5337_core_xc_masu.tcl

用于EOS芯片的驱动程序, 供参考 参考

  source /usr/lib/cgi-bin/apps/tclscripts/PM5337_util.tcl  

  ### 1. Disable MAPS function ###
  
  # Set to Active/Standby mode (non-MAPS mode)
  # Register 0x2000: LOSU L-code Threshold, PSL value and 
  #  configuration
  
  admwrb $devID 0x2000 16 0
  
  # Set egress G2i to an invalid location
  admwr $devID 0x2005 0x00000000 
    
  # Define the number of STM1 needs to be configure
  # mode 1 - STM1#1 to STM1#4 are configured
  # mode 2 - STM1#1 to STM1#8 are configured
  # mode 3 - STM1#1 to STM1#12 are configured
  # mode 4 - STM1#1 to STM1#16 are configured    
  
  if {$mode == 1} {
    set max_STM1 0x3
  } elseif {$mode == 2} {
    set max_STM1 0x7
  } elseif {$mode == 3} {
    set max_STM1 0xB
  } elseif {$mode == 4} {
    set max_STM1 0xF
  }
  
  # Set EGG2IPOSSEL to 0 for all 48 paths
  # Registers 0x2780 ~ 0x27BF: LOSU Insertion Selection
  # The address A [5:2] bits indicate the STS-3/STM-1 number, 
  #  which will be accessed (0000 for the STS-3/STM-1 #1).
  # The address A [1:0] bits indicate the STS-1/STM-0 number, 
  #  which will be accessed (00 for the STS-1/STM-0 #1. 11 is 
  #  reserved).     
  
  for {set stm1 0x0} {$stm1 <= $max_STM1} {incr stm1 0x1} {
    for {set stm0 0x0} {$stm0 <= 0x2} {incr stm0 0x1} {        
      
      set addr [expr (0x2780 + [expr $stm1 << 2]|$stm0)]
      admwrb $devID $addr 9 0

    }
  }
  
  ### 2. Configuring the FSINS[1:0] bit to enable AU3 to AU4 ###
  ###    conversion 					     ###    
  if {$payload == "AU4/TU11" || $payload == "AU4/TU12" || $payload == "AU4/TU2"} {

    # Performing AU3 to AU4 conversion by setting FSINS[1:0] to 10b
    for {set stm1 0x0} {$stm1 <= $max_STM1} {incr stm1 0x1} {
      for {set stm0 0x0} {$stm0 <= 0x2} {incr stm0 0x1} {        
             
        # Defining CM1 register address offset 
        set addr_CM1 [expr (0x2780 + [expr $stm1 << 2]|$stm0)]
            	                      
        admwrb $devID $addr_CM1 6 1 
        admwrb $devID $addr_CM1 5 0 
                
      }
    }    
  } else { 
    # Disable AU3 to AU4 conversion by setting FSINS[1:0] to 00b
    for {set stm1 0x0} {$stm1 <= $max_STM1} {incr stm1 0x1} {
      for {set stm0 0x0} {$stm0 <= 0x2} {incr stm0 0x1} {        
             
        # Defining CM1 register address offset 
        
        set addr_CM1 [expr (0x2780 + [expr $stm1 << 2]|$stm0)]
        
        admwrb $devID $addr_CM1 6 0 
        admwrb $devID $addr_CM1 5 0 
      }
    }   
  }    
   
  ### 3. Configuring the Egress Connection Memory (CM) to setup  ###
  ###    egress traffic mapping.                                 ###
      
  # The following lines setup the LOSU CM using the Incremental Mode  
  # with CM Page 2 active and CM Page 1 standby.
    
  # Set SW_CMP_MODE to 1 and SW_CMPS to 0
  admwrb $devID 0x0817 2 1
  admwrb $devID 0x0817 0 0
  
  # Configuring CM Page 1 for different payload types in LOSU 
  # Note: All paths are configured to the same payload types.                                                
      
  if {$payload == "VT15" || $payload == "AU3/TU11" || $payload == "AU4/TU11"} {  
    
    ### VT 1.5 / TU11 ###   
        
    for {set stm1 0x0} {$stm1 <= $max_STM1} {incr stm1 0x1} {
      for {set stm0 0x0} {$stm0 <= 0x2} {incr stm0 0x1} {
        for {set tug2 0x0} {$tug2 <= 0x6} {incr tug2 0x1} {
          for {set tu 0x0} {$tu <= 0x3} {incr tu 0x1} {
            # Defining CM1 register address offset
            set addr_CM1 [expr 0x2800 +  [expr $stm1 << 7]|[expr $stm0 << 5]|[expr $tug2 << 2]|$tu]
             
            # Defining source of traffic - straight through mapping
            set ilink 0
            set istm1 $stm1	
            set istm0 $stm0
            set itug2 $tug2
            set itu $tu
            set plsize 0x0 ;# 000b
            set insuneq 0
            set insais 0
            
            set data [expr [expr $ilink << 11]|[expr $istm1 << 7]|[expr $istm0 << 5]|[expr $itug2 << 2]|$itu|[expr $plsize <<19]|[expr $insais << 22]|[expr $insuneq << 23]]
                          
            # Writing Setting to Connection Memory 1
            admwr $devID $addr_CM1 $data
          }
        }         
      }  
    }   
  
  } elseif {$payload == "VT2" || $payload == "AU3/TU12"|| $payload == "AU4/TU12"} { 
  
    ### VT2 / TU12 ###
   
    for {set stm1 0x0} {$stm1 <= $max_STM1} {incr stm1 0x1} {
      for {set stm0 0x0} {$stm0 <= 0x2} {incr stm0 0x1} {
        for {set tug2 0x0} {$tug2 <= 0x6} {incr tug2 0x1} {
          for {set tu 0x0} {$tu <= 0x3} {incr tu 0x1} {
             
            # Defining CM1 register address offset
            set addr_CM1 [expr 0x2800 + [expr $stm1 << 7]|[expr $stm0 << 5]|[expr $tug2 << 2]|$tu]
             
            # Defining source of traffic - straight through mapping
            set ilink 0
            set istm1 $stm1	
            set istm0 $stm0
            set itug2 $tug2
            set itu $tu
            set insuneq 0
            set insais 0
             
            set plsize 0x1 ;#001
             
            set data [expr [expr $ilink << 11]|[expr $istm1 << 7]|[expr $istm0 << 5]|[expr $itug2 << 2]|$itu|[expr $plsize <<19]|[expr $insais << 22]|[expr $insuneq << 23]]
                          
            # Writing Setting to Connection Memory 1
            admwr $devID $addr_CM1 $data
          }
        }         
      }  
    }  
  
  } elseif {$payload == "VT3"} {
    
    ### VT3 ###
        
    for {set stm1 0x0} {$stm1 <= $max_STM1} {incr stm1 0x1} {
      for {set stm0 0x0} {$stm0 <= 0x2} {incr stm0 0x1} {
        for {set tug2 0x0} {$tug2 <= 0x6} {incr tug2 0x1} {
          for {set tu 0x0} {$tu <= 0x3} {incr tu 0x1} {
             
            # Defining CM1 register address offset
            set addr_CM1 [expr (0x2800 + [expr $stm1 << 7]|[expr $stm0 << 5]|[expr $tug2 << 2]|$tu)]
             
            # Defining source of traffic - straight through mapping
            set ilink 0
            set istm1 $stm1	
            set istm0 $stm0
            set itug2 $tug2
            set itu $tu
            set insuneq 0
            set insais 0
            
            # Setting payload type for VT2/TU12             
            if {$tu == 0x0 || $tu == 0x1} {
              set plsize 0x2 ;# 010	
    	    } 
       	    if {$tu == 0x2 || $tu == 0x3} {
      	      set plsize 0x5 ;# 101
   	    }
             
            set data [expr [expr $ilink << 11]|[expr $istm1 << 7]|[expr $istm0 << 5]|[expr $itug2 << 2]|$itu|[expr $plsize <<19]|[expr $insais << 22]|[expr $insuneq << 23]]
                          
            # Writing Setting to Connection Memory 1
            admwr $devID $addr_CM1 $data
          }
        }         
      }  
    }  
  
  } elseif {$payload == "VT6" || $payload == "AU4/TU2"|| $payload == "AU3/TU2"} {			
  
    ### VT6/TU2 ###
    
    
    for {set stm1 0x0} {$stm1 <= $max_STM1} {incr stm1 0x1} {
      for {set stm0 0x0} {$stm0 <= 0x2} {incr stm0 0x1} {
        for {set tug2 0x0} {$tug2 <= 0x6} {incr tug2 0x1} {
          for {set tu 0x0} {$tu <= 0x3} {incr tu 0x1} {
             
            # Defining CM1 register address offset
            set addr_CM1 [expr (0x2800 +([expr $stm1 << 7]|[expr $stm0 << 5]|[expr $tug2 << 2]|$tu))]
             
            # Defining source of traffic - straight through mapping
            set ilink 0
            set istm1 $stm1	
            set istm0 $stm0
            set itug2 $tug2
            set itu $tu
            set insuneq 0
            set insais 0
            
            # Setting payload type for VT6/TU2 
            if {$tu == 0x0 } {
      	      set plsize 0x3 ;#011	
    	    } 
    	    if {$tu == 0x1 || $tu == 0x2 || $tu == 0x3} {
      	      set plsize 0x5 ;#101
    	    }
             
            set data [expr [expr $ilink << 11]|[expr $istm1 << 7]|[expr $istm0 << 5]|[expr $itug2 << 2]|$itu|[expr $plsize <<19]|[expr $insais << 22]|[expr $insuneq << 23]]  		
                          
            # Writing Setting to Connection Memory 1
            admwr $devID $addr_CM1 $data
          }
        }         
      }  
    }
    
    
  } elseif {$payload == "STS-1" || $payload == "STS-3c"|| $payload == "STS-12c" || $payload == "AU4-4c" || $payload == "AU4/TU3"|| $payload == "AU4/C4"  || $payload == "AU3/C3"} {	
   
    ### STS1/STS-Nc ###        
    for {set stm1 0x0} {$stm1 <= $max_STM1} {incr stm1 0x1} {
      for {set stm0 0x0} {$stm0 <= 0x2} {incr stm0 0x1} {
        for {set tug2 0x0} {$tug2 <= 0x6} {incr tug2 0x1} {
          for {set tu 0x0} {$tu <= 0x3} {incr tu 0x1} {
             
            # Defining CM1 register address offset
            set addr_CM1 [expr (0x2800 + [expr $stm1 << 7]|[expr $stm0 << 5]|[expr $tug2 << 2]|$tu)]
             
            # Defining source of traffic - straight through mapping
            set ilink 0
            set istm1 $stm1	
            set istm0 $stm0
            set itug2 $tug2
            set itu $tu
            set insais 0
            set insuneq 0
            
            # Setting payload type for STS1
            if {$tug2 == 0x0 && $tu == 0x0} {
      	      set plsize 0x4 ;#100
	    } else {            
	      set plsize 0x5 ;#101 
	    }
             
            set data [expr [expr $ilink << 11]|[expr $istm1 << 7]|[expr $istm0 << 5]|[expr $itug2 << 2]|$itu|[expr $plsize <<19]|[expr $insais << 22]|[expr $insuneq << 23]]
                          
            # Writing Setting to Connection Memory 1
            admwr $devID $addr_CM1 $data
          }
        }         
      }  
    }
  } 
}

#------------------------------------------------------------------
# SCRIPT NAME: CORE_XC_CM_Switchover
#
# DESCRIPTION: 	This procedure assert and de-assert the SW_CMP_TRIG signal.
#
# PARAMETERS: 	devID  - This parameter is used to specify the device 
#                        under configuration
#
# NOTES: 1. The following script assumes the hardware CMP_TRIG 
#	    pins are pull low.  
#   
#-------------------------------------------------------------------

proc CORE_XC_CM_Switchover {devID} {

  source /usr/lib/cgi-bin/apps/tclscripts/PM5337_util.tcl  

  admwrb $devID 0x0817 1 1 ;# Assert SW_CMP_TRIG to copy Standby Page to Active Page
  after 100                ;# Wait for 100 ms
  admwrb $devID 0x0817 1 0 ;# Clear SW_CMP_TRIG
  
}

#-------------------------------------------------------------------
# SCRIPT NAME: CORE_XC_LOME_MAPS_Config
#
# DESCRIPTION: 	This procedure initializes the LOME block in
#		the ADM622 device when MAPS is enabled.  
#
# PARAMETERS: 	devID - This parameter is used to specify the device 
#                       under configuration
#
#               link - 1 or 2
#               
#               payload -  STS-1, STS-3c, STS-12c, VT15, VT2, VT3,
#                          VT6, AU3/C3, AU4/C4, AU4-4c, AU3/TU11,
#                          AU3/TU12, AU3/TU2, AU4/TU11, AU4/TU12,
#                          AU4/TU2, AU4/TU3 
#
#               g2i_col - 0x1 to 0x5A (90)
#
#               g2i_row - 0x1 to 0x9 
#
#               lcode_debounce_length - 0x1 to 0x7
#
#               base_lcode - 0x00 to 0xFE
#
#               manual_lcode - 0x00 to 0xFE
#
#               mode - This parameter is used to reduce the configuration
#                      steps when some connections in the STM-16 frame are 
#                      unused.  When set to:
#
#                      1 - Only STM-4 #1 is configured
#                      2 - Only STM-4 #1, STM-4 #2 are configured
#                      3 - Only STM-4 #1, STM-4 #2, STM-4#3 are configured
#                      4 - STM4 #1, STM-4 #2, STM-4 #3 and STM-4#4 are configured
#                      
#                      Important Note:  When payload type is TU2 or VT12, mode must be
#                                       set to 4
#                    
#
# NOTES: 1. The following script assumes the hardware CMPS and
#           CMP_TRIG pins are pull low.  
#
#	 2. The following script assumes CM2 is the active page and 
#	    CM1 is the standby page, and the incremental mode is
#           used.
#
#	 3. The settings on CM1 has not been activiated yet.
#
#	 4. Only MANUAL LCODE 0 is configured
#
#	 5. In this example, L-code to F-Code translation is as
#           following:
#
#             L-Code to F-Code Mapping Table
#             ------------------|------------------
#               L-Code          |       F-Code
#             ===================================== 
#               0xFF            |       0x3E
#             -------------------------------------
#               0xFE            |       0x3D