pm5337_config.tcl

用于EOS芯片的驱动程序, 供参考 参考

  ############################# 
  
  # Set DS1 to reflect mode and timing
  LEDRateSet $line_intf_mode $line_intf_mode
  LEDTimingSet $refclk_mode
  LEDLOSUpdate
  DS3Update   
}

#------------------------------------------------------------------------------
# SCRIPT NAME:	ADM622_Config4
#
# DESCRIPTION:	This procedure configures the ADM 622 device to demostrate the 
#               PDH functional blocks.
#	
# PARAMETERS:	devID  - This parameter is used to specify the device 
#                        under configuration
#
#               refclk_mode - 0 (Internal Clock), 1 (External via SMB)
#                             2 (Recover from Line Interface 1)
#                             3 (Recover from T1 clock)
#
#               line_intf_mode - 0 (disabled), 1 (OC-12), 2 (OC-3)
#
#               payload_config - 0 (STS-1), 1 (VT1.5), 2 (VT2)
#                                3 (AU3/C3), 4 (AU4/TU11), 5 (AU4/TU12), 
#                                6 (AU4/TU3), 7 (AU3/TU11), 8 (AU3/TU12), 
#                                
#               lineimp	- 0 (75 Ohms), 1 (100/120 Ohms)
#
#               t1_e1_mode - 0 (disabled)
#                            1 (28 T1 mapped/demapped in STS-1/VT1.5)
#                            2 (21 E1 mapped/demapped in AU4/TUG3/TU12)
#                            3 (28 T1 mapped/demapped in DS3 in a AU3 via M13 mux)
#
#		t1_framing - 0 (SF JPN = 0)
#			     1 (SLC96 JPN = 0)
#			     2 (Transparent JPN = 0)
#			     3 (ESF JPN = 0)
#			     4 (SF JPN = 1)
#			     5 (SLC96 JPN = 1)
#			     6 (Transparent JPN = 1)
#			     7 (ESF JPN = 1)
#
#		e1_framing - 0 (PCM30 without CRC-4)
# 			     1 (PCM31 without CRC-4)
#			     2 Transparent
# 			     3 (PCM30 with CRC-4 )
# 			     4 (PCM31 with CRC-4 )
#
#               ec1_ds3_e3_port1_mode - 0 (disabled)
#                                       1 (DS3 <-> AU3/VC3/C3)
#                                       2 (DS3 <-> AU4/TUG3/TU3/VC3/C3)
#                                       3 (E3 <-> AU3/VC3/C3)
#                                       4 (E3 <-> AU4/TUG3/TU3/VC3/C3)
#                                       5 (EC1: STS-1 or AU3/C3)
#                                       6 (EC1: STS-1/VT1.5 or AU3/TU11)
#                                       7 (EC1: STS-1/VT2 or AU3/TU12)
#
#		ds3_port1_framing - 0 (Unframed)
#			    	  - 1 (C-Bit Parity)
#			    	  - 2 (M23 )
#
#		e3_port1_framing - 0 (Unframed)
#			   	 - 1 (G.751)
#			   	 - 2 (G.832)
#
#               ec1_ds3_e3_port2_mode - 0 (disabled)
#                                       1 (DS3 <-> AU3/VC3/C3)
#                                       2 (DS3 <-> AU4/TUG3/TU3/VC3/C3)
#                                       3 (E3 <-> AU3/VC3/C3)
#                                       4 (E3 <-> AU4/TUG3/TU3/VC3/C3)
#                                       5 (EC1: STS-1 or AU3/C3)
#                                       6 (EC1: STS-1/VT1.5 or AU3/TU11)
#                                       7 (EC1: STS-1/VT2 or AU3/TU12)
#
#		ds3_port2_framing - 0 (Unframed)
#			    	  - 1 (C-Bit Parity)
#			    	  - 2 (M23 )
#
#		e3_port2_framing - 0 (Unframed)
#			   	 - 1 (G.751)
#			   	 - 2 (G.832)
#
#               ec1_ds3_e3_port3_mode - 0 (disabled)
#                                       1 (DS3 <-> AU3/VC3/C3)
#                                       2 (DS3 <-> AU4/TUG3/TU3/VC3/C3)
#                                       3 (E3 <-> AU3/VC3/C3)
#                                       4 (E3 <-> AU4/TUG3/TU3/VC3/C3)
#                                       5 (EC1: STS-1 or AU3/C3)
#                                       6 (EC1: STS-1/VT1.5 or AU3/TU11)
#                                       7 (EC1: STS-1/VT2 or AU3/TU12)              
#
#		ds3_port3_framing - 0 (Unframed)
#			    	  - 1 (M23 )
#			    	  - 2 (C-Bit Parity)
#
#		e3_port3_framing - 0 (Unframed)
#			   	 - 1 (G.751)
#			   	 - 2 (G.832)
#
# NOTES: 1. When t1_e1_mode is set to 3, ec1_ds3_e2_port 3 must be set to 0 
#           (disabled)
#
#------------------------------------------------------------------------------
proc ADM622_Config4 { {devID 0} {refclk_mode 0} {line_intf_mode 1} {payload_config 1}
                      {lineimp 0} {t1_e1_mode 1} {t1_framing 0} {e1_framing 0} 
                      {ec1_ds3_e3_port1_mode 0} {ds3_port1_framing 1} {e3_port1_framing 0}
                      {ec1_ds3_e3_port2_mode 0} {ds3_port2_framing 1} {e3_port2_framing 0}
                      {ec1_ds3_e3_port3_mode 0} {ds3_port3_framing 1} {e3_port3_framing 0}} {
                     
  ##################################################
  ##### Sourcing all TCL configuration scripts #####
  ##################################################    
  #source PM5337_util.tcl  ;# this file is sourced in the PM5337_TOP.tcl file
  
  source /usr/lib/cgi-bin/apps/tclscripts/PM5337_TOP.tcl
  source /usr/lib/cgi-bin/apps/tclscripts/PM5337_LINE_SONET.tcl  
  source /usr/lib/cgi-bin/apps/tclscripts/PM5337_LINE_SONET_SLP.tcl
  source /usr/lib/cgi-bin/apps/tclscripts/PM5337_LINE_SONET_APS.tcl
  source /usr/lib/cgi-bin/apps/tclscripts/PM5337_LINE_SONET_HOPP.tcl
  source /usr/lib/cgi-bin/apps/tclscripts/PM5337_LINE_SONET_LOPP.tcl
  source /usr/lib/cgi-bin/apps/tclscripts/PM5337_LINE_SONET_LUT.tcl
  source /usr/lib/cgi-bin/apps/tclscripts/PM5337_LINE_SONET_ALARMS.tcl  
  source /usr/lib/cgi-bin/apps/tclscripts/PM5337_SYS_SONET.tcl
  source /usr/lib/cgi-bin/apps/tclscripts/PM5337_PDH.tcl
  source /usr/lib/cgi-bin/apps/tclscripts/PM5337_EOS.tcl
  source /usr/lib/cgi-bin/apps/tclscripts/PM5337_CORE_XC.tcl
  source /usr/lib/cgi-bin/apps/tclscripts/PM5337_CORE_XC_MASU.tcl
  source /usr/lib/cgi-bin/apps/tclscripts/TDK_FPGA.tcl
  source /usr/lib/cgi-bin/apps/tclscripts/hdliu_init.tcl
  source /usr/lib/cgi-bin/apps/tclscripts/LED.tcl

  
  
  ####################################
  ##### Defining Local Variables #####
  ####################################  
  # Defining payload naming notation used by different procedure
  
  if {$payload_config == 0} {
    set XC_payload "STS-1"
    set HO_payload "STS-1"
    set LO_payload "STS-1"
    set tu 0 ;# flag to indicate no VT/TUs in data stream
  } elseif {$payload_config == 1} {
    set XC_payload "VT15"
    set HO_payload "STS-1"
    set LO_payload "VT15"
    set tu 1 ;# flag to indicate VT/TUs in data stream
  } elseif {$payload_config == 2} {
    set XC_payload "VT2"
    set HO_payload "STS-1"
    set LO_payload "VT2"
    set tu 1 ;# flag to indicate VT/TUs in data stream    
  } elseif {$payload_config == 3} {
    set XC_payload "AU3/C3" 
    set HO_payload "AU3"
    set LO_payload "AU3/C3" 
    set tu 0 ;# flag to indicate no VT/TUs in data stream
  } elseif {$payload_config == 4} {
    set XC_payload "AU4/TU11"
    set HO_payload "AU4"
    set LO_payload "AU4/TU11"
    set tu 1 ;# flag to indicate VT/TUs in data stream    
  } elseif {$payload_config == 5} {
    set XC_payload "AU4/TU12"
    set HO_payload "AU4"
    set LO_payload "AU4/TU12"
    set tu 1 ;# flag to indicate VT/TUs in data stream     
  } elseif {$payload_config == 6} {
    set XC_payload "AU4/TU3"
    set HO_payload "AU4"
    set LO_payload "AU4/TU3"
    set tu 1 ;# flag to indicate VT/TUs in data stream    
  } elseif {$payload_config == 7} {
    set XC_payload "AU3/TU11"
    set HO_payload "AU3"
    set LO_payload "AU3/TU11"
    set tu 1 ;# flag to indicate VT/TUs in data stream    
  } elseif {$payload_config == 8} {
    set XC_payload "AU3/TU12"
    set HO_payload "AU3"
    set LO_payload "AU3/TU12"
    set tu 1 ;# flag to indicate VT/TUs in data stream    
  } 
  
  ###################################################
  ##### Perform Device Reset and Initialization #####
  ###################################################          
  if {$devID == -1} {
    puts "<br>"
    puts "/*---------- Device Reset and Initialization ----------*/<br>"  
  }
  
  # Call Top level initialization scripts
  TOP_Init $devID     
  
  ##########################################
  ##### Reference Clock Configuration  #####
  ##########################################
  if {$devID == -1} {
    puts "<br>"
    puts "/*---------- Reference Clock Configuration ----------*/<br>"  
  }

  if {$refclk_mode == 0} {
    # Configure 3-to-1 Mux to have no input
    wr cpld 0x3 0x0
 
    # Enable free run mode
    set init_value [rd fpga 0x7]
    set value [expr $init_value | 0x1 << 10]
    set value [dec2hex $value] 
    wr fpga 0x7 $value        
    
    # Enable Fast Lock mode
    set init_value [rd fpga 0x7]
    set value [expr $init_value | 0x1]    
    set value [dec2hex $value] 
    wr fpga 0x7 $value     
    
    # Setup Timing LED 
    set timing_led 0x0 ;# free run mode
    set init_value [expr 0xFFCF & [rd fpga 0x2]]
    set value [expr $init_value | $timing_led << 4]    
    set value [dec2hex $value]
    wr fpga 0x2 $value
    
  } elseif {$refclk_mode == 1} {
    # Configure 3-to-1 Mux to source from SMB connector
    wr cpld 0x3 0x1
    
    # Enable Fast Lock mode
    set init_value [rd fpga 0x7]
    set value [expr $init_value | 0x1]    
    set value [dec2hex $value] 
    wr fpga 0x7 $value       
    
    # Enable normal mode
    set init_value [rd fpga 0x7]
    set value [expr $init_value & 0xF9FF]
    set value [dec2hex $value] 
    wr fpga 0x7 $value    
    
    # Setup Timing LED 
    set timing_led 0x1 ;# Extenal or T1 mode
    set init_value [expr 0xFFCF & [rd fpga 0x2]]
    set value [expr $init_value | $timing_led << 4] 
    set value [dec2hex $value]   
    wr fpga 0x2 $value    
    
  } elseif {$refclk_mode == 2} {              
    # Configure 3-to-1 Mux to source from PGMRCLK[1]    
    wr cpld 0x3 0x2
        
    # Enable Fast Lock mode
    set init_value [rd fpga 0x7]
    set value [expr $init_value | 0x1]   
    set value [dec2hex $value]  
    wr fpga 0x7 $value       
    
    # Enable normal mode
    set init_value [rd fpga 0x7]
    set value [expr $init_value & 0xF9FF]
    set value [dec2hex $value] 
    wr fpga 0x7 $value   
    
    # Setup Timing LED 
    set timing_led 0x2 ;# Recovered from Line Interface 1
    set init_value [expr 0xFFCF & [rd fpga 0x2]]
    set value [expr $init_value | $timing_led << 4]    
    set value [dec2hex $value]
    wr fpga 0x2 $value    
    
  } elseif {$refclk_mode == 3} {              
    # Configure 3-to-1 Mux to source from T1     
    wr cpld 0x3 0x3
    
    # Enable Fast Lock mode
    set init_value [rd fpga 0x7]
    set value [expr $init_value | 0x1]  
    set value [dec2hex $value]  
    wr fpga 0x7 $value       
    
    # Enable normal mode
    set init_value [rd fpga 0x7]
    set value [expr $init_value & 0xF9FF]
    set value [dec2hex $value] 
    wr fpga 0x7 $value   
    
    # Setup Timing LED
    set timing_led 0x1 ;# Extenal or T1 mode
    set init_value [expr 0xFFCF & [rd fpga 0x2]]
    set value [expr $init_value | $timing_led << 4]    
    set value [dec2hex $value]
    wr fpga 0x2 $value    
  }      


  ############################################
  ##### CORE_XC Subsystem Configuration  #####
  ############################################
  if {$devID == -1} {
    puts "<br>"
    puts "/*---------- CORE_XC Subsystem Configuration ----------*/<br>"    
  }
  ### Enable the CORE_XC subsystem to SMART Framing Mode with CMP switching ###
  ### in Incremental mode with CM2 active.                                  ###
  CORE_XC_Init $devID 0 2 

  ### Configure Input Port Mux ###
  # Rx1 -> Input of MASU link 1 STM-4 #1   
  # Add PDH -> Input of MAUS link 1 STM-4 #2  
  
  CORE_XC_Input_MUX_Config $devID 0x14 0x17 -1 -1 -1 -1 -1 -1 -1 -1
  
  ### Configure Output Port Mux ###
  # Output of MASU link 1 STM4 #1 -> Drop PDH
  # Output of MAUS link 1 STM4 #2 -> Tx1
  
  CORE_XC_Output_MUX_Config $devID -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 0x1A -1 -1 0x19 -1
    

  ##############################################
  ##### SYS_SONET Subsystem Configuration  #####
  ##############################################  
  if {$devID == -1} {
    puts "<br>"
    puts "/*---------- SYS_SONET Subsystem Configuration ----------*/<br>"  
  }
  # Disable System Side ESSI Links
  SYS_SONET_ESSI_Init $devID 0  
      
  ###############################################
  ##### LINE_SONET Subsystem Configuration  #####
  ###############################################  
  if {$devID == -1} {
    puts "<br>"
    puts "/*---------- LINE_SONET Subsystem Configuration ----------*/<br>"  
  }
  
  ### 1. Line Interface Configuration  ###
    
  # Initialize LINE_SONET Subsystem
  LINE_SONET_Init $devID 1
  
  ### 2. Configure line interfaces 1 ###
  if {$line_intf_mode == 1} {    
    # Configure Line Interface #1 to OC-12 mode
    LINE_SONET_Line_Intf_Config $devID 0 0 1 0 10100
  } elseif {$line_intf_mode == 2} {    
    # Configure Line Interface #1 to OC-3 mode
    LINE_SONET_Line_Intf_Config $devID 0 0 0 0 10100
  }  
   
  ### 3. Linear APS Core Configuration  ###  
  # Disable Linear APS Core  
  LINE_SONET_Li