pm5337_config.tcl

用于EOS芯片的驱动程序, 供参考 参考

    set XC_payload "AU3/C3" 
    set HO_payload "AU3"
    set LO_payload "AU3/C3" 
    set tu 0 ;# flag to indicate no VT/TUs in data stream
  } elseif {$payload_config == 10} {
    set XC_payload "AU4/TU11"
    set HO_payload "AU4"
    set LO_payload "AU4/TU11"
    set tu 1 ;# flag to indicate VT/TUs in data stream    
  } elseif {$payload_config == 11} {
    set XC_payload "AU4/TU12"
    set HO_payload "AU4"
    set LO_payload "AU4/TU12"
    set tu 1 ;# flag to indicate VT/TUs in data stream    
  } elseif {$payload_config == 12} {
    set XC_payload "AU4/TU2"
    set HO_payload "AU4"
    set LO_payload "AU4/TU2"
    set tu 1 ;# flag to indicate VT/TUs in data stream    
  } elseif {$payload_config == 13} {
    set XC_payload "AU4/TU3"
    set HO_payload "AU4"
    set LO_payload "AU4/TU3"
    set tu 1 ;# flag to indicate VT/TUs in data stream    
  } elseif {$payload_config == 14} {
    set XC_payload "AU3/TU11"
    set HO_payload "AU3"
    set LO_payload "AU3/TU11"
    set tu 1 ;# flag to indicate VT/TUs in data stream    
  } elseif {$payload_config == 15} {
    set XC_payload "AU3/TU12"
    set HO_payload "AU3"
    set LO_payload "AU3/TU12"
    set tu 1 ;# flag to indicate VT/TUs in data stream    
  } elseif {$payload_config == 16} {
    set XC_payload "AU3/TU2"
    set HO_payload "AU3"
    set LO_payload "AU3/TU2"
    set tu 1 ;# flag to indicate VT/TUs in data stream    
  } 
     
  # Defining G2i byte Position
  # Note: the G2i byte row and column position is offseted by 1 between the input 
  #       of the procedure and the CORE_XC_LOME_MAPS_Config and 
  #       CORE_XC_LOSU_MAPS_Config procedures.  Therefore, the inputs are incremented
  #       by 1.
  set g2i_row [expr $g2i_row + 1]
  set g2i_col [expr $g2i_col + 1]
      
  # Defining timer value
  # Note: the timer parameter input for the CORE_XC_LOME_MAPS_Config procedure is
  #       ranged from 0x00 to 0x3F.  
  if {$timer_mode == 0} {
    # 0 sec
    set timer 0x00
  } elseif {$timer_mode == 1} {
    # 10 sec
    set timer 0x0A
  } elseif {$timer_mode == 2} {
    # 20 sec
    set timer 0x14
  } elseif {$timer_mode == 3} {
    # 30 sec
    set timer 0x1E
  }          
                          
  ###################################################
  ##### Perform Device Reset and Initialization #####
  ###################################################          
  if {$devID == -1} {
    puts "<br>"
    puts "/*---------- Device Reset and Initialization ----------*/<br>"  
  }
  
  # Call Top level initialization scripts
  TOP_Init $devID   
  
  ##########################################
  ##### Reference Clock Configuration  #####
  ##########################################
  if {$devID == -1} {
    puts "<br>"
    puts "/*---------- Reference Clock Configuration ----------*/<br>"  
  }

  if {$refclk_mode == 0} {
    # Configure 3-to-1 Mux to have no input
    wr cpld 0x3 0x0
 
    # Enable free run mode
    set init_value [rd fpga 0x7]
    set value [expr $init_value | 0x1 << 10]
    set value [dec2hex $value] 
    wr fpga 0x7 $value        
    
    # Enable Fast Lock mode
    set init_value [rd fpga 0x7]
    set value [expr $init_value | 0x1]    
    set value [dec2hex $value] 
    wr fpga 0x7 $value     
    
    # Setup Timing LED 
    set timing_led 0x0 ;# free run mode
    set init_value [expr 0xFFCF & [rd fpga 0x2]]
    set value [expr $init_value | $timing_led << 4]    
    set value [dec2hex $value]
    wr fpga 0x2 $value
    
  } elseif {$refclk_mode == 1} {
    # Configure 3-to-1 Mux to source from SMB connector
    wr cpld 0x3 0x1
    
    # Enable Fast Lock mode
    set init_value [rd fpga 0x7]
    set value [expr $init_value | 0x1]    
    set value [dec2hex $value] 
    wr fpga 0x7 $value       
    
    # Enable normal mode
    set init_value [rd fpga 0x7]
    set value [expr $init_value & 0xF9FF]
    set value [dec2hex $value] 
    wr fpga 0x7 $value    
    
    # Setup Timing LED 
    set timing_led 0x1 ;# Extenal or T1 mode
    set init_value [expr 0xFFCF & [rd fpga 0x2]]
    set value [expr $init_value | $timing_led << 4] 
    set value [dec2hex $value]   
    wr fpga 0x2 $value    
    
  } elseif {$refclk_mode == 2} {              
    # Configure 3-to-1 Mux to source from PGMRCLK[1]    
    wr cpld 0x3 0x2
        
    # Enable Fast Lock mode
    set init_value [rd fpga 0x7]
    set value [expr $init_value | 0x1]   
    set value [dec2hex $value]  
    wr fpga 0x7 $value       
    
    # Enable normal mode
    set init_value [rd fpga 0x7]
    set value [expr $init_value & 0xF9FF]
    set value [dec2hex $value] 
    wr fpga 0x7 $value   
    
    # Setup Timing LED 
    set timing_led 0x2 ;# Recovered from Line Interface 1
    set init_value [expr 0xFFCF & [rd fpga 0x2]]
    set value [expr $init_value | $timing_led << 4]    
    set value [dec2hex $value]
    wr fpga 0x2 $value    
    
  } elseif {$refclk_mode == 3} {              
    # Configure 3-to-1 Mux to source from T1     
    wr cpld 0x3 0x3
    
    # Enable Fast Lock mode
    set init_value [rd fpga 0x7]
    set value [expr $init_value | 0x1]  
    set value [dec2hex $value]  
    wr fpga 0x7 $value       
    
    # Enable normal mode
    set init_value [rd fpga 0x7]
    set value [expr $init_value & 0xF9FF]
    set value [dec2hex $value] 
    wr fpga 0x7 $value   
    
    # Setup Timing LED
    set timing_led 0x1 ;# Extenal or T1 mode
    set init_value [expr 0xFFCF & [rd fpga 0x2]]
    set value [expr $init_value | $timing_led << 4]    
    set value [dec2hex $value]
    wr fpga 0x2 $value    
  }          
  
  ############################################
  ##### CORE_XC Subsystem Configuration  #####
  ############################################
  if {$devID == -1} {
    puts "<br>"
    puts "/*---------- CORE_XC Subsystem Configuration ----------*/<br>"    
  }
  ### Enable the CORE_XC subsystem to SMART Framing Mode with CMP switching ###
  ### in Incremental mode with CM2 active.                                  ###
  CORE_XC_Init $devID 0 2 
  
  ### Configure Input Port Mux ###
  # Rx1 -> MASU link 1 STM4-1
  # Rx2 -> MASU link 2 STM4-1
  CORE_XC_Input_MUX_Config $devID 0x14 -1 -1 -1 0x15 -1 -1 -1 -1 -1
  
  
  ### Configure Output Port Mux ###
  # Tx1 -> MASU link 1 STM4-1
  # Tx2 -> MASU link 1 STM4-1
  CORE_XC_Output_MUX_Config $devID -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 0x19 0x19 -1 -1 -1
  
  
  
  ##############################################
  ##### SYS_SONET Subsystem Configuration  #####
  ##############################################  
  if {$devID == -1} {
    puts "<br>"
    puts "/*---------- SYS_SONET Subsystem Configuration ----------*/<br>"  
  }
  # Disable System Side ESSI Links
  SYS_SONET_ESSI_Init $devID 0 
    
  ###############################################
  ##### LINE_SONET Subsystem Configuration  #####
  ###############################################  
  if {$devID == -1} {
    puts "<br>"
    puts "/*---------- LINE_SONET Subsystem Configuration ----------*/<br>"   
  }
  ### 1. Line Interface Configuration  ###
    
  # Initialize LINE_SONET Subsystem
  LINE_SONET_Init $devID 1
  
  if {$line_intf_mode == 1} {    
    # Configure Line Interface #1 and #2 to OC-12 mode
    LINE_SONET_Line_Intf_Config $devID 0 0 1 0 10100
    LINE_SONET_Line_Intf_Config $devID 1 0 1 0 10100
  } elseif {$line_intf_mode == 2} {    
    # Configure Line Interface #1 and #2 to OC-3 mode
    LINE_SONET_Line_Intf_Config $devID 0 0 0 0 10100
    LINE_SONET_Line_Intf_Config $devID 1 0 0 0 10100
  }          
      
  ### 2. Linear APS Core Configuration  ###  
  
  # Disable Linear APS Core  
  LINE_SONET_Linear_APS_Config $devID 0
  
  ### 3. Payload Configuration for HOPP and LOPP slice 1 and 2 ###   
  LINE_SONET_HO_Payload_Config $devID 1 $HO_payload
  LINE_SONET_LO_Payload_Config $devID 1 $LO_payload
    
  LINE_SONET_HO_Payload_Config $devID 2 $HO_payload
  LINE_SONET_LO_Payload_Config $devID 2 $LO_payload
      
  ### 4. MAPS Framer Configuration ###
  # High Order MAPS Framer (SARCH)
  LINE_SONET_HO_MAPS_Config $devID 1 1 $g2i_row $g2i_col 
  LINE_SONET_HO_MAPS_Config $devID 2 1 $g2i_row $g2i_col    
  
  # Low Order MAPS Framer (SARCL)
  if {$tu == 1} {
    LINE_SONET_LO_MAPS_Config $devID 1 $g2i_row $g2i_col 1
    LINE_SONET_LO_MAPS_Config $devID 2 $g2i_row $g2i_col 1
  }              
    
  # Turn off REI-L generation
  wr adm 0x1360 0x211
  wr adm 0x13E0 0x211
  
  # Turn off RDI-P generation
  for {set sts3 0} {$sts3 <= 3} {incr sts3} {
    for {set sts1 0} {$sts1 <= 2} {incr sts1} {  
      admindwr $devID LINE_SONET::HOPP::THPP_1 0x0300 $sts3 $sts1
      admindwr $devID LINE_SONET::HOPP::THPP_2 0x0300 $sts3 $sts1
    }
  }
          
  ### 6. ADM 622 Reference Clock Configuration ###
  # Configure Line CSU to source clock input from SYSCLK_P/N and
  # set frequency to 155.52 MHz.
  LINE_SONET_Timing_Config $devID 1 1
  
  # Configure PGMRCLK[1] to generate a 8kHz clock based on the recovered clock 
  # from Line Interface #1.  Configure PGMTCLK to generate a 8kHz clock.  
  LINE_SONET_PGMCLK_Config $devID 1 0 4 1 0 4 0 0 0
  
  ########################################
  ##### EOS Subsystem Configuration  #####
  ########################################
  if {$devID == -1} {
    puts "<br>"
    puts "/*---------- EOS Subsystem Configuration ----------*/<br>"    
  }
  # EOS Subsystem is unused

  # Disable FE and GE PHY
  set init_value [rd cpld 0x2]
  set value [expr ($init_value & 0xFFEF) | (1 << 5)]    
  set value [dec2hex $value] 
  wr cpld 0x2 $value         

  ########################################
  ##### PDH Subsystem Configuration  #####
  ########################################
  if {$devID == -1} {
    puts "<br>"
    puts "/*---------- PDH Subsystem Configuration ----------*/<br>"   
  }
  
  # PDH Subsystem is unused
  # Hold TDK LIU channels in Soft Reset 
  TDKReset 0
  TDKReset 1
  TDKReset 2
  
  # Disable HDLIU
  set init_value [rd cpld 0x2]
  set value [expr $init_value & 0xFFFD]    
  set value [dec2hex $value] 
  wr cpld 0x2 $value     

  
  ###############################
  ##### MASU Configuration  #####
  ###############################  
  if {$devID == -1} {
    puts "<br>"
    puts "/*---------- MASU Configuration ----------*/<br>"    
  }
  
  ### Configure MASU Block with MAPS Enabled ###   
  if {$payload_config == 4 || $payload_config == 11 || $payload_config == 15 } {    
    # Note: when the payload contain a VT2/TU12, the whole STM-16 must be configured
                
    # Configure LOME link 1 and 2
    CORE_XC_LOME_MAPS_Config $devID 1 $XC_payload $g2i_col $g2i_row 0x0 0x00 0x00 4          
    CORE_XC_LOME_MAPS_Config $devID 2 $XC_payload $g2i_col $g2i_row 0x0 0x00 0x00 4
            
    # Configure LOMP link 1 and 2
    CORE_XC_LOMP_MAPS_Config $devID 1 $statemachine $timer 4
    CORE_XC_LOMP_MAPS_Config $devID 2 $statemachine $timer 4        
    
    # Configure LOSU     
    CORE_XC_LOSU_MAPS_Config $devID $XC_payload $g2i_col $g2i_row 4
    
    # Perform LOME CM Switchover
    CORE_XC_CM_Switchover $devID                             
    
  } else {
    # Note: Only the first STM-4 in a STM-16 is configured
    
    # Configure LOME link 1 and 2
    CORE_XC_LOME_MAPS_Config $devID 1 $XC_payload $g2i_col $g2i_row 0x7 0x00 0x00 1            
    CORE_XC_LOME_MAPS_Config $devID 2 $XC_payload $g2i_col $g2i_row 0x7 0x00 0x00 1
            
    # Configure LOMP link 1 and 2
    CORE_XC_LOMP_MAPS_Config $devID 1 $statemachine $timer 1
    CORE_XC_LOMP_MAPS_Config $devID 2 $statemachine $timer 1        
        
    # Configure LOSU     
    CORE_XC_LOSU_MAPS_Config $devID $XC_payload $g2i_col $g2i_row 1    
      
    # Perform LOME CM Switchover
    CORE_XC_CM_Switchover $devID   
  
  }    

       
  #############################
  ##### LED Status Update #####