📄 pm5337_eos_demo.tcl
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#------------------------------------------------------------------------------
# FILE NAME: PM5337_EOS_Demo.tcl
#
# DESCRIPTION: This file includes the following procedures:
# 1) HDLC_Generic_Filter_Demo
# 2) EOS_VCG_STS12C_Demo
# 3) EOS_VCG_STS3C_Demo
# 4) EOS_VCG_64VT15_Demo
# 5) EOS_Counter_Demo
# NOTES:
#
# REVISION History:
# Preliminary 1 - Script created
#------------------------------------------------------------------------------
#------------------------------------------------------------------------------
# SCRIPT NAME: HDLC_Generic_Filter_Demo
#
# DESCRIPTION: This script enable the EOS subsystem and de-assert the reset
# bit in each mega block.
#
# PARAMETERS: devID - This parameter is used to specify the device
# under configuration
#
# channel - 0 to 7
#
# mode - 0 : Frame will be droped if header is not equal to 04 03 FE 01
# 1 : Frame will be droped if header is equal to 04 03 FE 01
#
# NOTES:
#
#------------------------------------------------------------------------------
proc HDLC_Generic_Filter_Demo {devID channel mode} {
#############################
### Set Generic Filter 0 ###
#############################
set gf0_byte 0x04
set gf1_byte 0x03
set gf2_byte 0xFE
set gf3_byte 0x01
set gf0_mask 0xFF
set gf1_mask 0xFF
set gf2_mask 0xFF
set gf3_mask 0xFF
set data1 [expr ($gf0_byte << 8)|$gf0_mask]
set data2 [expr ($gf1_byte << 8)|$gf1_mask]
set data3 [expr ($gf2_byte << 8)|$gf2_mask]
set data4 [expr ($gf3_byte << 8)|$gf3_mask]
# a) Perform Indirect Read to Initialize Indirect Access
set req_busy 1
set rwb 1
set ireg_grp 0x3
set addr_value [expr ($req_busy << 15)|($rwb << 14)|($ireg_grp << 5)|$channel]
admwr $devID 0xE601 $addr_value
Poll_BUSY_Bit $devID 0xE601 15 ;# Poll busy bit until low
# b) Write value Indirect Data Registers
admwr $devID 0xE602 $data1
admwr $devID 0xE603 $data2
admwr $devID 0xE604 $data3
admwr $devID 0xE605 $data4
# c) Activiate channel setting in RXDP Indirect Channel Control Register
set req_busy 1
set rwb 0
set ireg_grp 0x3
set addr_value [expr ($req_busy << 15)|($rwb << 14)|($ireg_grp << 5)|$channel]
admwr $devID 0xE601 $addr_value
Poll_BUSY_Bit $devID 0xE601 15 ;# Poll busy bit until low
####################################
### Set Generic Filter 0 Control ###
####################################
if {$mode == 0x0} {
set gf0_rev 0x1
set gf0_drop 0x1
}
if {$mode == 0x1} {
set gf0_rev 0x0
set gf0_drop 0x1
}
set gf0_idx 0x0
set gf0_fdf 0x0
set gf0_fdo 0x0
set data1 [expr ($gf0_idx << 4)|($gf0_rev << 3)|($gf0_drop << 2)|($gf0_fdf << 1)|($gf0_fdo << 0)]
# a) Perform Indirect Read to Initialize Indirect Access
set req_busy 1
set rwb 1
set ireg_grp 0x2
set addr_value [expr ($req_busy << 15)|($rwb << 14)|($ireg_grp << 5)|$channel]
admwr $devID 0xE601 $addr_value
Poll_BUSY_Bit $devID 0xE601 15 ;# Poll busy bit until low
# b) Write value Indirect Data Registers
admwr $devID 0xE602 $data1
admwr $devID 0xE603 0x0
admwr $devID 0xE604 0x0
admwr $devID 0xE605 0x0
# c) Activiate channel setting in RXDP Indirect Channel Control Register
set req_busy 1
set rwb 0
set ireg_grp 0x2
set addr_value [expr ($req_busy << 15)|($rwb << 14)|($ireg_grp << 5)|$channel]
admwr $devID 0xE601 $addr_value
Poll_BUSY_Bit $devID 0xE601 15 ;# Poll busy bit until low
}
#------------------------------------------------------------------------------
# SCRIPT NAME: EOS_VCG_STS12C_Demo
#
# DESCRIPTION: This procedure configures the EOS Subsystem to map 1 FE/GE port to
# 1 STS-12c.
#
# PARAMETERS: devID - This parameter is used to specify the device
# under configuration
#
# NOTES:
#
# 1 FE/GE --> 1x STS-12c
#
# timeslot : 1 2 3 4 5 6 7 8 9 10 11 12
# sts3_ind : 0 1 2 3 0 1 2 3 0 1 2 3
# sts1_ind : 0 0 0 0 1 1 1 1 2 2 2 2
# channel : 0 0 0 0 0 0 0 0 0 0 0 0
#------------------------------------------------------------------------------
proc EOS_VCG_STS12C_Demo {devID} {
# Reset VCAT
admwrb $devID 0xE000 1 1
after 1
admwrb $devID 0xE000 1 0
# Enable Add EOS to Drop EOS loopback
admwr $devID 0xE005 0x1
# Added the following lines
admwrb $devID 0xE340 0 1
admwrb $devID 0xE341 0 0
admwrb $devID 0xE342 0 0
admwrb $devID 0xE343 0 0
admwrb $devID 0xE344 0 0
admwrb $devID 0xE345 0 0
admwrb $devID 0xE346 0 0
admwrb $devID 0xE347 0 0
admwrb $devID 0xE348 0 0
admwrb $devID 0xE349 0 0
admwrb $devID 0xE34A 0 0
admwrb $devID 0xE34B 0 0
# EOS_Payload_Config $devID STS-12c
# Subsystem level configuration
admwr $devID 0xE030 0x20010000
admwr $devID 0xE031 0x10010000
for {set stm1 1} {$stm1 <= 4} {incr stm1} {
for {set tug3 1} {$tug3 <= 3} {incr tug3} {
for {set tug2 1} {$tug2 <= 7} {incr tug2} {
for {set tu 1} {$tu <= 4} {incr tu} {
set stm1 [dec2hex $stm1]
set tug3 [dec2hex $tug3]
set tug2 [dec2hex $tug2]
set tu [dec2hex $tu]
# Set TRIB_RESET to '1'
admindwr $devID EOS::LOHO_SONET::TTOP336_EOS 0x8030 0xE382 $stm1 $tug3 $tug2 $tu
}
}
}
}
# TVCP payload configuration
admwr $devID 0xE501 0xFFFF ;# STS3_1
admwr $devID 0xE502 0xFFF0 ;# STS3_2
admwr $devID 0xE503 0xFFF0 ;# STS3_3
admwr $devID 0xE504 0xFFF0 ;# TUG3
admwr $devID 0xE505 0x0FFF ;# HO_SEL
#######################################################################
### Initializing TVCP - Far End Sink (MST) Buffer and Group ###
### Context Memory ###
#######################################################################
##### 1. Initializing MST Buffer #####
# Note: All MST must be initialized to FAIL when provisioning the
# first member for a group or if all the members in the group
# are in IDLE.
for {set grouptag 0} {$grouptag <= 7} {incr grouptag} {
for {set wordoffset 0} {$wordoffset <= 7} {incr wordoffset} {
### i. Poll MEM_BUSY Bit in 0xE508 ###
Poll_BUSY_Bit $devID 0xE508 15
### ii. Calculate and Set MEM_ADDR ###
# MEM_ADDR = Group-Tag *8 + Word Offset
set mem_addr [expr $grouptag*8 + $wordoffset]
admwr $devID 0xE509 $mem_addr
### iii. Setting FE SK MST Value ###
admwr $devID 0xE50A 0x00FF ;# bit 15 to 0
admwr $devID 0xE50B 0x0000 ;# bit 31 to 16
admwr $devID 0xE50C 0x0000 ;# bit 47 to 32
admwr $devID 0xE50D 0x0000 ;# bit 63 to 48
### iv. Trigger Indirect Write Access ###
# MEM_BUSY = 1
# MEM_RWB = 0
# MEM_SEL = 0x1
admwr $devID 0xE508 0x8001
}
}
##### 2. Initializing Group Context Memory #####
# Note: GID_SEED allows software to program an initial seed
# for the GID generation of each group, which should
# be done prior to provisioning the first member for the
# group. A unique and non-zero seed for each group should
# be set. In the following example, the group seed is set
# to be equal to the grouptag (i.e. channel #)
set wordoffset 0x2
for {set grouptag 0} {$grouptag <= 7} {incr grouptag} {
### i. Poll MEM_BUSY Bit in 0xE508 ###
Poll_BUSY_Bit $devID 0xE508 15
### ii. Calculate and Set MEM_ADDR ###
# MEM_ADDR = Group-Tag *3 + Word Offset
set mem_addr [expr $grouptag*3 + $wordoffset]
admwr $devID 0xE509 $mem_addr
### iii. Randomly asign GID seed = grouptag ###
admwr $devID 0xE50A $grouptag ;# bit 15 to 0
admwr $devID 0xE50B 0x0000 ;# bit 31 to 16
admwr $devID 0xE50C 0x0000 ;# bit 47 to 32
admwr $devID 0xE50D 0x0000 ;# bit 63 to 48
### iv. Trigger Indirect Write Access ###
# MEM_BUSY = 1
# MEM_RWB = 0
# MEM_SEL = 0x2
admwr $devID 0xE508 0x8002
}
#######################################################################
##### Initializing RVCP - Near End Source (MST) Buffer and Group #####
##### Configuration Table Memory Structure #####
#######################################################################
##### 1. Initializing MST Buffer #####
# Note: All MST must be initialized to FAIL when provisioning the
# first member for a group or if all the members in the group
# are in IDLE.
for {set grouptag 0} {$grouptag <= 7} {incr grouptag} {
### i. Poll MEM_BUSY Bit ###
Poll_BUSY_Bit $devID 0xE410 15
### ii. Calculate and Set MEM_ADDR ###
# MEM_ADDR = Group-Tag
admwr $devID 0xE411 $grouptag
### iii. Setting NE SK MST Value ###
admwr $devID 0xE412 0x00FF ;# bit 15 to 0
admwr $devID 0xE413 0x0000 ;# bit 31 to 16
admwr $devID 0xE414 0x0000 ;# bit 47 to 32
admwr $devID 0xE415 0x0000 ;# bit 63 to 48
admwr $devID 0xE416 0x0000 ;# bit 79 to 64
admwr $devID 0xE417 0x0000 ;# bit 95 to 80
admwr $devID 0xE418 0x0000 ;# bit 111 to 96
admwr $devID 0xE419 0x0000 ;# bit 127 to 112
### iv. Trigger Indirect Write Access ###
# MEM_BUSY =1
# MEM_RWB = 0
# MEM_SEL = 0xB
admwr $devID 0xE410 0x800B
}
#####################################################################
##### Configuring Group Configuration Table Memory Structure #####
#####################################################################
for {set grouptag 0} {$grouptag <= 7} {incr grouptag} {
### i. Poll MEM_BUSY Bit ###
Poll_BUSY_Bit $devID 0xE410 15
### ii. Calculate and Set MEM_ADDR ###
# MEM_ADDR = Group-Tag
admwr $devID 0xE411 $grouptag
admwr $devID 0xE412 0xFFFF ;# bit 15 to 0
admwr $devID 0xE413 0x3 ;# bit 31 to 16
admwr $devID 0xE414 0x0000 ;# bit 47 to 32
admwr $devID 0xE415 0x0000 ;# bit 63 to 48
admwr $devID 0xE416 0x0000 ;# bit 79 to 64
admwr $devID 0xE417 0x0000 ;# bit 95 to 80
admwr $devID 0xE418 0x0000 ;# bit 111 to 96
admwr $devID 0xE419 0x0000 ;# bit 127 to 112
### iv. Trigger Indirect Write Access ###
# MEM_BUSY =1
# MEM_RWB = 0
# MEM_SEL = 0x1
admwr $devID 0xE410 0x8001
}
#######################################################################
### Provisioning VCG Member for Mode 0 (STS-1) ###
#######################################################################
# timeslot : 1 2 3 4 5 6 7 8 9 10 11 12
# sts3_ind : 0 1 2 3 0 1 2 3 0 1 2 3
# sts1_ind : 0 0 0 0 1 1 1 1 2 2 2 2
# channel : 0 0 0 0 0 0 0 0 0 0 0 0
#################################################################
### Configurating Transmit Link Configuration Table (TVCP) ###
#################################################################
#############################
### Configuring Channel 0 ###
#############################
set sts3_ind 0
set sts1_ind 0
### ii. Poll MEM_BUSY Bit in 0xE508 ###
Poll_BUSY_Bit $devID 0xE508 15
### iii. Calculate and Set MEM_ADDR ###
# MEM_ADDR = STS3_index*3 + STS1_index, where STS3_index ranges
# from 0 to 3, and STS1_index ranges from 0 to 2.
set mem_addr [expr ($sts3_ind * 3) + $sts1_ind]
admwr $devID 0xE509 $mem_addr
### iv. Setting Link Configuration Table Memory Value ###
# VC_SQ[5:0] = 0x00
# Group Tag[4:0] = Ethernet Channel = 0x0
# Inhibit = 0x0
# Prov/Mode[1:0] = VCAT non-LCAS = 0x2
set vc_sq 0x0
set group_tag 0
set inhibit 0x0
set prov_mode 0x2
set mem_data0 [expr [expr $vc_sq << 10]|[expr $group_tag << 4]|[expr $inhibit << 3]|$prov_mode]
admwr $devID 0xE50A $mem_data0 ;# bit 15 to 0
admwr $devID 0xE50B 0x0000 ;# bit 31 to 16
admwr $devID 0xE50C 0x0000 ;# bit 47 to 32
admwr $devID 0xE50D 0x0000 ;# bit 63 to 48
### v. Trigger Indirect Write Access ###
# MEM_BUSY = 1
# MEM_RWB = 0
# MEM_SEL = 0x0
admwr $devID 0xE508 0x8000
#############################
### Configuring Channel 1 ###
#############################
set sts3_ind 1
set sts1_ind 0
### ii. Poll MEM_BUSY Bit in 0xE508 ###
Poll_BUSY_Bit $devID 0xE508 15
### iii. Calculate and Set MEM_ADDR ###
# MEM_ADDR = STS3_index*3 + STS1_index, where STS3_index ranges
# from 0 to 3, and STS1_index ranges from 0 to 2.
set mem_addr [expr ($sts3_ind * 3) + $sts1_ind]
admwr $devID 0xE509 $mem_addr
### iv. Setting Link Configuration Table Memory Value ###
# VC_SQ[5:0] = 0x00
# Group Tag[4:0] = Ethernet Channel = 0x0
# Inhibit = 0x0
# Prov/Mode[1:0] = 0x2
set vc_sq 0x1
set group_tag 0
set inhibit 0x0
set prov_mode 0x2
set mem_data0 [expr [expr $vc_sq << 10]|[expr $group_tag << 4]|[expr $inhibit << 3]|$prov_mode]
admwr $devID 0xE50A $mem_data0 ;# bit 15 to 0
admwr $devID 0xE50B 0x0000 ;# bit 31 to 16
admwr $devID 0xE50C 0x0000 ;# bit 47 to 32
admwr $devID 0xE50D 0x0000 ;# bit 63 to 48
### v. Trigger Indirect Write Access ###
# MEM_BUSY = 1
# MEM_RWB = 0
# MEM_SEL = 0x0
admwr $devID 0xE508 0x8000
#############################
### Configuring Channel 2 ###
#############################
set sts3_ind 2
set sts1_ind 0
### ii. Poll MEM_BUSY Bit in 0xE508 ###
Poll_BUSY_Bit $devID 0xE508 15
### iii. Calculate and Set MEM_ADDR ###
# MEM_ADDR = STS3_index*3 + STS1_index, where STS3_index ranges
# from 0 to 3, and STS1_index ranges from 0 to 2.
set mem_addr [expr ($sts3_ind * 3) + $sts1_ind]
admwr $devID 0xE509 $mem_addr
### iv. Setting Link Configuration Table Memory Value ###
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