pm5337_line_sonet.tcl

用于EOS芯片的驱动程序, 供参考 参考

      admwrb $devID 0x1000 3 0
      admwrb $devID 0x1000 2 0                       
      
      ##### Line Rate Configuration #####      
      # rate = 0 for OC-3, rate = 1 for OC-12
      admwrb $devID 0x0000 23 $rate

      if {$rate == 1} {
        # Set DCRU_MODE[1] to 0
        admwrb $devID 0x1000 5 0 ;# set this to low for OC-12
      }
      if {$rate == 0} {
        # Set DCRU_MODE[1] to 0
        admwrb $devID 0x1000 5 1 ;# set this to high for OC-3
        
        # Configure DCRU
        admwrb $devID 0x10E0 5 0
        admwrb $devID 0x10E0 4 0
        admwrb $devID 0x10E0 2 0
        
        # Enable DCRU
        admwr $devID 0x10E3 0x0000
      }        
      
      ##### RX and Tx Analog Configuration #####      
      # Enable analog receiver
      admwrb $devID 0x1037 11 1
      admwrb $devID 0x1037 15 1
      
      # Enable analog transmitter
      admwrb $devID 0x103D 15 1
      
      # Enable DJAT
      admwr $devID 0x10F3 0x0
                  
      ### RX Equalization ###
      if {$rx_eq == 2} {      
        # Configure Rx Equalization to High
        admwrb $devID 0x103A 9 1
        admwrb $devID 0x103A 8 0  		
      } elseif {$rx_eq == 1} {
        # Configure Rx Equalization to Low
        admwrb $devID 0x103A 9 0
        admwrb $devID 0x103A 8 1  		
      } elseif {$rx_eq == 0} {
        # Disable Rx Equalization
        admwrb $devID 0x103A 9 0
        admwrb $devID 0x103A 8 0  		
      }
  	
      ### Configure Tx Swing Level ###    
      set txmode4 [string index $txmode4_0 0]
      set txmode3 [string index $txmode4_0 1]
      set txmode2 [string index $txmode4_0 2]
      set txmode1 [string index $txmode4_0 3]
      set txmode0 [string index $txmode4_0 4]
      
      admwrb $devID 0x103D 4 $txmode4
      admwrb $devID 0x103D 3 $txmode3
      admwrb $devID 0x103D 2 $txmode2
      admwrb $devID 0x103D 1 $txmode1
      admwrb $devID 0x103D 0 $txmode0
   
    } elseif {$mode == 1} {
      ##### Configure Auxilliary Port input to SLP #####
      # 10: The Line Receive and Transmit interfaces #x are unused and the System ESSI/P-TCB
      # are used as line interface. The Section and Line Processor #x processes the receive data and
      # generate the transmit data through the subsystem auxiliary interfaces connected to the
      # CORE_XC subsystem. The line rate is automatically STS-12/STM-4.
      
      admwrb $devID 0x1000 3 1
      admwrb $devID 0x1000 2 0
      
      ##### Disable Line Interface  #####
      # Disable analog receiver
      admwrb $devID 0x1037 11 0
      admwrb $devID 0x1037 15 0
      
      # Disable analog transmitter
      admwrb $devID 0x103D 15 0 
  		
    } elseif {$mode == 2} {
      ##### Configure Auxilliary Port input to HOPP #####
      # 11: The Line Receive and Transmit interfaces #x are unused and the System ESSI/P-TCB
      # are used as line interface. The High-Order Path Processor #x processes the receive data and
      # generate the transmit data through the subsystem auxiliary interfaces connected to the
      # CORE_XC subsystem. The line rate is automatically STS-12/STM-4.
  		      
      admwrb $devID 0x1000 3 1
      admwrb $devID 0x1000 2 1
      
      ##### Disable Line Interface  #####
      # Disable analog receiver
      admwrb $devID 0x1037 11 0
      admwrb $devID 0x1037 15 0
      
      # Disable analog transmitter
      admwrb $devID 0x103D 15 0 
    
    } elseif {$mode == 3} {
      ##### Set default LINE_MODE #### 
      # 00 or 01: The Line Receive and Transmit interfaces #x are used as the line interface. The
      # line rate is controlled by the LINE_SONET Device Configuration register LINE_622[2:1]
      # bits (STS-12/STM-4 or STS-3/STM-1).  	      
      admwrb $devID 0x1000 3 0
      admwrb $devID 0x1000 2 0  
            
      ##### Disable Line Interface  #####
      # Disable analog receiver
      admwrb $devID 0x1037 11 0
      admwrb $devID 0x1037 15 0
      
      # Disable analog transmitter
      admwrb $devID 0x103D 15 0        
    }
  }
}

#------------------------------------------------------------------------------
# SCRIPT NAME:	LINE_SONET_Timing_Config
#
# DESCRIPTION:	This procedure configures the Line CSU input clock source.
#		
# PARAMETERS:	devID - This parameter is used to specify the device 
#                       under configuration
#
#               clk_source - 0 (REFCLK_P/N), 1 (SYSCLK_P/N)
#
#               clk_freq - 0 (77.76 MHz), 1 (155.52 MHz)
#
# NOTE:
#
#------------------------------------------------------------------------------
proc LINE_SONET_Timing_Config {devID clk_source clk_freq} {
  
  source /usr/lib/cgi-bin/apps/tclscripts/PM5337_util.tcl  
  
  # Configure Line CSU clock source (register 0x1084 bit 4)
  admwrb $devID 0x1084 4 $clk_source
  
  # Configure Line CSU clock frequency (register 0x1085 bit 12)
  admwrb $devID 0x1085 12 $clk_freq
  admwrb $devID 0x1040 13 $clk_freq

}

#------------------------------------------------------------------------------
# SCRIPT NAME:	LINE_SONET_PGMCLK_Config
#
# DESCRIPTION:	This procedure enables or disables the line receive and line 
#               transmit clocks
#		
# PARAMETERS:	devID - This parameter is used to specify the device 
#                       under configuration
#
#               tx_enable     - 0 (disable), 1 (enable)
#
#               tx_src        - 0 (interface #1), 1 (interface #2)
#
#               tx_frequency  - 1 (77.76 MHz), 2 (19.44 MHz),
#                               3(6.48 MHz), 4 (8 kHz) 
#
#               rx1_enable    - 0 (disable), 1 (enable)
#
#               rx1_src       - 0 (interface #1), 1 (interface #2)
#
#               rx1_frequency - 1 (77.76 MHz), 2 (19.44 MHz),
#                               3(6.48 MHz), 4 (8 kHz) 
#
#               rx2_enable    - 0 (disable), 1 (enable)
#
#               rx2_src       - 0 (interface #1), 1 (interface #2)
#
#               rx2_frequency - 1 (77.76 MHz), 2 (19.44 MHz),
#                               3(6.48 MHz), 4 (8 kHz) 
#
#------------------------------------------------------------------------------

proc LINE_SONET_PGMCLK_Config {devID tx_enable tx_src tx_frequency rx1_enable rx1_src 
                               rx1_frequency rx2_enable rx2_src rx2_frequency} {

  source /usr/lib/cgi-bin/apps/tclscripts/PM5337_util.tcl  

  ################################################
  #####     Transmit Clock  (PGMTCLK)        #####
  ################################################
  
  ### Set enable and source on transmit clock
  admwrb $devID 0x1029 8 $tx_enable
  admwrb $devID 0x1029 11 $tx_src
  
  ### Set frequency on transmit clock
  if {$tx_frequency == 1} {
    # Set freq to 77.76 MHz
    admwrb $devID 0x1029 10 1
    admwrb $devID 0x1029 9 1
  } elseif {$tx_frequency == 2} {
    # Set freq to 19.44 MHz
    admwrb $devID 0x1029 10 1
    admwrb $devID 0x1029 9 0
  } elseif {$tx_frequency == 3} {
    # Set freq to 6.48 MHz
    admwrb $devID 0x1029 10 0
    admwrb $devID 0x1029 9 1
  } elseif {$tx_frequency == 4} {
    # Set freq to 8 kHz
    admwrb $devID 0x1029 10 0
    admwrb $devID 0x1029 9 0
  }
  
  
  ################################################
  #####    Receive Clock #1  (PGMRCLK[1])    #####
  ################################################
  
  ### Set enable and source on receive clock 1
  admwrb $devID 0x1029 0 $rx1_enable
  admwrb $devID 0x1029 3 $rx1_src
  
  ### Set frequency on transmit clock
  if {$rx1_frequency == 1} {
    # Set freq to 77.76 MHz
    admwrb $devID 0x1029 2 1
    admwrb $devID 0x1029 1 1
  } elseif {$rx1_frequency == 2} {
    # Set freq to 19.44 MHz
    admwrb $devID 0x1029 2 1
    admwrb $devID 0x1029 1 0
  } elseif {$rx1_frequency == 3} {
    # Set freq to 6.48 MHz
    admwrb $devID 0x1029 2 0
    admwrb $devID 0x1029 1 1
  } elseif {$rx1_frequency == 4} {
    # Set freq to 8 kHz
    admwrb $devID 0x1029 2 0
    admwrb $devID 0x1029 1 0
  }
  
  ################################################
  #####    Receive Clock #2   (PGMRCLK[2])   #####
  ################################################
  
  ### Set enable and source on receive clock 2
  admwrb $devID 0x1029 4 $rx2_enable
  admwrb $devID 0x1029 7 $rx2_src
  
  ### Set frequency on transmit clock
  if {$rx2_frequency == 1} {
    # Set freq to 77.76 MHz
    admwrb $devID 0x1029 6 1
    admwrb $devID 0x1029 5 1
  } elseif {$rx2_frequency == 2} {
    # Set freq to 19.44 MHz
    admwrb $devID 0x1029 6 1
    admwrb $devID 0x1029 5 0
  } elseif {$rx2_frequency == 3} {
    # Set freq to 6.48 MHz
    admwrb $devID 0x1029 6 0
    admwrb $devID 0x1029 5 1
  } elseif {$rx2_frequency == 4} {
    # Set freq to 8 kHz
    admwrb $devID 0x1029 2 0
    admwrb $devID 0x1029 1 0
  }  
}