pll_orin.c

ucosII在TMS320LF2407成功移植的源代码

#include "C2407_REG_C.h"
#include "includes.h"


#define CLK_PS_MASK  (7<<9)

enum C2407Modules {ALL,ADC,SCI,SPI,CAN,EVB,EVA};

volatile INT16U* scsr1 = SCSR1;

void setSysClkFreq(INT16U DSPFreq)
{

  
  *scsr1 &=~CLK_PS_MASK;
  /*
  ******************************************************                       
  *               Internal Frequency Table             *
  ******************************************************
  *                 clk_ref=10MHz                      *
  ******************************************************
    CLKPS2  CLKPS1  CLKPS0          Operation Freauency              
  ------------------------------------------------------
      0       0       0                4 * clk_ref = 40MHz 
      0       0       1                2 * clk_ref = 20MHz
      0       1       0               1.33*clk_ref = 13.3MHz
      0       1       1                1 * clk_ref = 10MHz
      1       0       0               0.8 *clk_ref = 8MHz
      1       0       1               0.66*clk_ref = 6.6MHz
      1       1       0               0.57*clk_ref = 5.7MHz
      1       1       1               0.5 *clk_ref = 5MHz 
  */
  /* 40MHz */
  if (DSPFreq >=30)   *scsr1 |=(0<<9);
  /* 20MHz */
  if ((DSPFreq >=15)&&(DSPFreq<30))  *scsr1 |=(1<<9);
  /* 13.3MHz */
  if ((DSPFreq >=12)&&(DSPFreq<15))  *scsr1 |=(2<<9);
  /* 10MHz */
  if ((DSPFreq >=9)&&(DSPFreq<12))   *scsr1 |=(3<<9);
  /* 8MHz */
  if ((DSPFreq >=7)&&(DSPFreq<9))    *scsr1 |=(4<<9);
  /* 6.6MHz */
  if ((DSPFreq >=6)&&(DSPFreq<7))    *scsr1 |=(5<<9);
  /* 5.7MHz */
  if ((DSPFreq >5)&&(DSPFreq<6))     *scsr1 |=(6<<9);
  /* 5MHz */
  if (DSPFreq<=5)   *scsr1 |=(7<<9);
  
  }
  
  void moduleClkEnable(enum C2407Modules module)
  {
     switch(module)
     {
	     case ALL: {*scsr1 |=0xFE;break;}
	     case ADC: {*scsr1 |=(1<<7);break;}
	     case SCI: {*scsr1 |=(1<<6);break;}
	     case SPI: {*scsr1 |=(1<<5);break;}
	     case CAN: {*scsr1 |=(1<<4);break;}
	     case EVB: {*scsr1 |=(1<<3);break;}
	     case EVA: {*scsr1 |=(1<<2);break;}
     }
   }
   
  void moduleClkDisable(enum C2407Modules module)
  {
     switch(module)
     {
	     case ALL: {*scsr1 &=~0xFE;break;}
	     case ADC: {*scsr1 &=~(1<<7);break;}
	     case SCI: {*scsr1 &=~(1<<6);break;}
	     case SPI: {*scsr1 &=~(1<<5);break;}
	     case CAN: {*scsr1 &=~(1<<4);break;}
	     case EVB: {*scsr1 &=~(1<<3);break;}
	     case EVA: {*scsr1 &=~(1<<2);break;}
     }
   }