c240x_isr.c

ucosII在TMS320LF2407成功移植的源代码

#include "C2407_REG_C.h"
#include "Data_types.h"
//#include "includes.h"
#define   T1MS		0x61a8 //0x9c3f 

volatile INT16U *pivr     =  PIVR;
volatile INT16U *pedatdir =  PEDATDIR;
volatile INT16U *evaimra  =  EVAIMRA;
volatile INT16U *evaifra  =  EVAIFRA;
volatile INT16U *gptcona  =  GPTCONA;
volatile INT16U *t1pr     =  T1PR;
volatile INT16U *t1cnt    =  T1CNT;
volatile INT16U *t1con    =  T1CON;

/*
*********************************************************************************************************
*                                General Interrupt Service Routine Level 2
*
* Description: This function is GISR level 2, in this function CPU reads the PIVR and identifies which 
*              interrupt it is in level 2, and call the corresponding service routine.             
*
* Arguments  : Void
*
* Returns    : Void
*
*********************************************************************************************************
*/
void interrupt GISR2(void)	
{
   
   switch(*pivr)
   {  
   		case 0x27:		/* T1PINT，0x27 is the interrupt vector of general timer1 priodic interrupt */
   		{
			OSTickISR();
   		   	break;
   		}
   }
} 

/*
*********************************************************************************************************
*                                General Interrupt Service Routine Level 5
*
* Description: This function is GISR level 5, in this function CPU reads the PIVR and identifies which 
*              interrupt it is in level 5, and call the corresponding service routine.             
*
* Arguments  : Void
*
* Returns    : Void
*
*********************************************************************************************************
*/
void interrupt GISR5(void)	
{
    //clrc	INTM						; enable interrupt nesting.

	 OSIntEnter();
   switch(*pivr)
   {  
   		case 0x06:		/* RXINT，0x06 is the interrupt vector of SCI receiver interrupt(low priority mode) */
   		{
			CommRxISR();
   		   	break;
   		}
   		
   		case 0x07:		/* TXINT，0x07 is the interrupt vector of SCI transmitter interrupt(low priority mode) */
   		{
			CommTxISR();
   		   	break;
   		}
   }
   OSIntExit();
} 


void gp_init(void)
{
   *evaimra = 0x80;		/* 使能T1PINT即通用定时器1周期中断 */
   *evaifra = 0xffff;	/* 清除中断标志 */
   *gptcona = 0x0000;	
   *t1pr    = T1MS; 	/* 周期寄存器=25000 */
   *t1cnt   = 0;		/* 计数初值=0 */
   *t1con   = 0x1440;	/* 启动计数器 */
}

/*******************************************************************************
*
* Routine	:   void abort(void)
*
* Purpose   : 	Satisfy a link requirement.
*
* Inputs    :   None (void).
*
* Globals	:	None.
*
* Outputs (Returns):
*				None (void).
*
* Note(s)	:   Should never get here.  Should add code to annunciate if we
*				ever do.
*
*******************************************************************************/
/*void abort(void)
	{
    while (1);
    }*/
/*******************************************************************************
*
* Routine	:   void interrupt DefaultISR(void)
*
* Purpose   : 	Supply a default ISR for unused vectors.
*
* Inputs    :   None (void).
*
* Globals	:	None.
*
* Outputs (Returns):
*				None (void).
*
* Note(s)	:   Should add code to annunciate if we ever get here.
*
*******************************************************************************/
void interrupt DefaultISR(void)
	{
    }