i2c_synplify.tlg

Xilinx ISE 官方源代码盘第十章

Synthesizing work.i2c.behave
Synthesizing work.uc_interface.behaviour
@N:"D:\My_Design\I2C\source\uc_interface.vhd":111:16:111:17|Using sequential encoding for type state_type
@W:"D:\My_Design\I2C\source\uc_interface.vhd":267:35:267:43|Signal prs_state in the sensitivity list is not used in the process
Post processing for work.uc_interface.behaviour
@W:"D:\My_Design\I2C\source\uc_interface.vhd":331:2:331:3|Optimizing register bit madr(0) to a constant 0
Synthesizing work.i2c_control.behave
@N:"D:\My_Design\I2C\source\i2c_control.vhd":104:16:104:17|Using onehot encoding for type state_type (idle="1000000")
@N:"D:\My_Design\I2C\source\i2c_control.vhd":108:20:108:21|Using onehot encoding for type scl_state_type (scl_idle="1000000")
@N:"D:\My_Design\I2C\source\i2c_control.vhd":233:4:233:11|Removed redundant assignment
@N:"D:\My_Design\I2C\source\i2c_control.vhd":535:3:535:14|Removed redundant assignment
@N:"D:\My_Design\I2C\source\i2c_control.vhd":575:3:575:6|Removed redundant assignment
@N:"D:\My_Design\I2C\source\i2c_control.vhd":635:3:635:5|Removed redundant assignment
@N:"D:\My_Design\I2C\source\i2c_control.vhd":684:3:684:10|Removed redundant assignment
Synthesizing work.upcnt4.definition
Post processing for work.upcnt4.definition
Synthesizing work.shift8.definition
Post processing for work.shift8.definition
Post processing for work.i2c_control.behave
Post processing for work.i2c.behave