prescale_counter.mrp

Xilinx ISE 官方源代码盘第七章 Part 2

Release 6.2i Map G.28
Xilinx Mapping Report File for Design 'prescale_counter'

Design Information
------------------
Command Line   : D:/Xilinx/bin/nt/map.exe -intstyle ise -p xc2s200-pq208-6 -cm
area -pr b -k 4 -c 100 -tx off -o prescale_counter_map.ncd prescale_counter.ngd
prescale_counter.pcf 
Target Device  : x2s200
Target Package : pq208
Target Speed   : -6
Mapper Version : spartan2 -- $Revision: 1.16.8.1 $
Mapped Date    : Fri Jul 09 17:16:03 2004

Design Summary
--------------
Number of errors:      0
Number of warnings:    0
Logic Utilization:
  Number of Slice Flip Flops:       480 out of  4,704   10%
  Number of 4 input LUTs:           401 out of  4,704    8%
Logic Distribution:
    Number of occupied Slices:                         531 out of  2,352   22%
    Number of Slices containing only related logic:    531 out of    531  100%
    Number of Slices containing unrelated logic:         0 out of    531    0%
        *See NOTES below for an explanation of the effects of unrelated logic
Total Number 4 input LUTs:          614 out of  4,704   13%
      Number used as logic:                       401
      Number used as a route-thru:                105
      Number used as Shift registers:             108
   Number of bonded IOBs:            33 out of    140   23%
   Number of Block RAMs:              3 out of     14   21%
   Number of GCLKs:                   2 out of      4   50%
   Number of GCLKIOBs:                1 out of      4   25%
   Number of BSCANs:                  1 out of      1  100%

Total equivalent gate count for design:  70,362
Additional JTAG gate count for IOBs:  1,632
Peak Memory Usage:  69 MB

NOTES:

   Related logic is defined as being logic that shares connectivity -
   e.g. two LUTs are "related" if they share common inputs.
   When assembling slices, Map gives priority to combine logic that
   is related.  Doing so results in the best timing performance.

   Unrelated logic shares no connectivity.  Map will only begin
   packing unrelated logic into a slice once 99% of the slices are
   occupied through related logic packing.

   Note that once logic distribution reaches the 99% level through
   related logic packing, this does not mean the device is completely
   utilized.  Unrelated logic packing will then begin, continuing until
   all usable LUTs and FFs are occupied.  Depending on your timing
   budget, increased levels of unrelated logic packing may adversely
   affect the overall timing performance of your design.


Table of Contents
-----------------
Section 1 - Errors
Section 2 - Warnings
Section 3 - Informational
Section 4 - Removed Logic Summary
Section 5 - Removed Logic
Section 6 - IOB Properties
Section 7 - RPMs
Section 8 - Guide Report
Section 9 - Area Group Summary
Section 10 - Modular Design Summary
Section 11 - Timing Report
Section 12 - Configuration String Information
Section 13 - Additional Device Resource Counts

Section 1 - Errors
------------------

Section 2 - Warnings
--------------------

Section 3 - Informational
-------------------------
INFO:LIT:95 - All of the external outputs in this design are using slew rate
   limited output drivers. The delay on speed critical outputs can be
   dramatically reduced by designating them as fast outputs in the schematic.
INFO:MapLib:562 - No environment variables are currently set.

Section 4 - Removed Logic Summary
---------------------------------
 102 block(s) removed
  63 block(s) optimized away
  57 signal(s) removed

Section 5 - Removed Logic
-------------------------

The trimmed logic report below shows the logic removed from your design due to
sourceless or loadless signals, and VCC or ground connections.  If the removal
of a signal or symbol results in the subsequent removal of an additional signal
or symbol, the message explaining that second removal will be indented.  This
indentation will be repeated as a chain of related logic is removed.

To quickly locate the original cause for the removal of a chain of logic, look
above the place where that logic is listed in the trimming report, then locate
the lines that are least indented (begin at the leftmost edge).

Loadless block "U_icon_pro/icon_pro/u_icon/u_cmd/u_core_id_sel/i4/fi/10/u_lut"
(ROM) removed.
Loadless block "U_icon_pro/icon_pro/u_icon/u_cmd/u_core_id_sel/i4/fi/11/u_lut"
(ROM) removed.
Loadless block "U_icon_pro/icon_pro/u_icon/u_cmd/u_core_id_sel/i4/fi/12/u_lut"
(ROM) removed.
Loadless block "U_icon_pro/icon_pro/u_icon/u_cmd/u_core_id_sel/i4/fi/13/u_lut"
(ROM) removed.
Loadless block "U_icon_pro/icon_pro/u_icon/u_cmd/u_core_id_sel/i4/fi/14/u_lut"
(ROM) removed.
Loadless block "U_icon_pro/icon_pro/u_icon/u_cmd/u_core_id_sel/i4/fi/2/u_lut"
(ROM) removed.
Loadless block "U_icon_pro/icon_pro/u_icon/u_cmd/u_core_id_sel/i4/fi/3/u_lut"
(ROM) removed.
Loadless block "U_icon_pro/icon_pro/u_icon/u_cmd/u_core_id_sel/i4/fi/4/u_lut"
(ROM) removed.
Loadless block "U_icon_pro/icon_pro/u_icon/u_cmd/u_core_id_sel/i4/fi/5/u_lut"
(ROM) removed.
Loadless block "U_icon_pro/icon_pro/u_icon/u_cmd/u_core_id_sel/i4/fi/6/u_lut"
(ROM) removed.
Loadless block "U_icon_pro/icon_pro/u_icon/u_cmd/u_core_id_sel/i4/fi/7/u_lut"
(ROM) removed.
Loadless block "U_icon_pro/icon_pro/u_icon/u_cmd/u_core_id_sel/i4/fi/8/u_lut"
(ROM) removed.
Loadless block "U_icon_pro/icon_pro/u_icon/u_cmd/u_core_id_sel/i4/fi/9/u_lut"
(ROM) removed.
Loadless block
"U_ila_pro_0/ila_pro_0/i_no_d/u_ila/u_trig/i_srlt_eq_1/gk/0/u_tmev" (ROM)
removed.
Loadless block
"U_ila_pro_0/ila_pro_0/i_no_d/u_ila/u_trig/i_srlt_eq_1/gk/1/u_tmev" (ROM)
removed.
Loadless block
"U_ila_pro_0/ila_pro_0/i_no_d/u_ila/u_trig/i_srlt_eq_1/gk/2/u_tmev" (ROM)
removed.
Loadless block "U_ila_pro_0/ila_pro_0/i_no_d/u_ila/u_trig/i_srlt_eq_1/u_tme"
(ROM) removed.
Loadless block
"U_ila_pro_0/ila_pro_0/i_no_d/u_ila/u_trig/u_tc/i_srlt_eq_1/gi/1/u_lut" (ROM)
removed.
 The signal "U_ila_pro_0/i_no_d/u_ila/u_trig/cfg_trigcond_en_vec_14" is loadless
and has been removed.
  Loadless block
"U_ila_pro_0/ila_pro_0/i_no_d/u_ila/u_trig/i_srlt_eq_1/gi/1/u_tcev" (ROM)
removed.
Loadless block
"U_ila_pro_0/ila_pro_0/i_no_d/u_ila/u_trig/u_tc/i_srlt_eq_1/gi/2/u_lut" (ROM)
removed.
 The signal "U_ila_pro_0/i_no_d/u_ila/u_trig/cfg_trigcond_en_vec_13" is loadless
and has been removed.
  Loadless block
"U_ila_pro_0/ila_pro_0/i_no_d/u_ila/u_trig/i_srlt_eq_1/gi/2/u_tcev" (ROM)
removed.
Loadless block
"U_ila_pro_0/ila_pro_0/i_no_d/u_ila/u_trig/u_tc/i_srlt_eq_1/gi/3/u_lut" (ROM)
removed.
 The signal "U_ila_pro_0/i_no_d/u_ila/u_trig/cfg_trigcond_en_vec_12" is loadless
and has been removed.
  Loadless block
"U_ila_pro_0/ila_pro_0/i_no_d/u_ila/u_trig/i_srlt_eq_1/gi/3/u_tcev" (ROM)
removed.
Loadless block
"U_ila_pro_0/ila_pro_0/i_no_d/u_ila/u_trig/u_tc/i_srlt_eq_1/gi/4/u_lut" (ROM)
removed.
 The signal "U_ila_pro_0/i_no_d/u_ila/u_trig/cfg_trigcond_en_vec_11" is loadless
and has been removed.
  Loadless block
"U_ila_pro_0/ila_pro_0/i_no_d/u_ila/u_trig/i_srlt_eq_1/gi/4/u_tcev" (ROM)
removed.
Loadless block
"U_ila_pro_0/ila_pro_0/i_no_d/u_ila/u_trig/u_tm/g_nmu/0/u_m/i_srlt_eq_1/gi/0/u_m
cev" (ROM) removed.
Loadless block
"U_ila_pro_0/ila_pro_0/i_no_d/u_ila/u_trig/u_tm/g_nmu/0/u_m/i_srlt_eq_1/gi/1/u_m
cev" (ROM) removed.
Loadless block
"U_ila_pro_0/ila_pro_0/i_no_d/u_ila/u_trig/u_tm/g_nmu/0/u_m/i_srlt_eq_1/gi/2/u_m
cev" (ROM) removed.
Loadless block
"U_ila_pro_0/ila_pro_0/i_no_d/u_ila/u_trig/u_tm/g_nmu/0/u_m/i_srlt_eq_1/u_mce"
(ROM) removed.
Loadless block
"U_ila_pro_0/ila_pro_0/i_no_d/u_ila/u_trig/u_tm/g_nmu/1/u_m/i_srlt_eq_1/gi/0/u_m
cev" (ROM) removed.
Loadless block
"U_ila_pro_0/ila_pro_0/i_no_d/u_ila/u_trig/u_tm/g_nmu/1/u_m/i_srlt_eq_1/gi/1/u_m
cev" (ROM) removed.
Loadless block
"U_ila_pro_0/ila_pro_0/i_no_d/u_ila/u_trig/u_tm/g_nmu/1/u_m/i_srlt_eq_1/gi/2/u_m
cev" (ROM) removed.
Loadless block
"U_ila_pro_0/ila_pro_0/i_no_d/u_ila/u_trig/u_tm/g_nmu/1/u_m/i_srlt_eq_1/u_mce"
(ROM) removed.
Loadless block
"U_ila_pro_0/ila_pro_0/i_no_d/u_ila/u_trig/u_tm/g_nmu/2/u_m/i_srlt_eq_1/gi/0/u_m
cev" (ROM) removed.
Loadless block
"U_ila_pro_0/ila_pro_0/i_no_d/u_ila/u_trig/u_tm/g_nmu/2/u_m/i_srlt_eq_1/gi/1/u_m
cev" (ROM) removed.
Loadless block
"U_ila_pro_0/ila_pro_0/i_no_d/u_ila/u_trig/u_tm/g_nmu/2/u_m/i_srlt_eq_1/gi/2/u_m
cev" (ROM) removed.
Loadless block
"U_ila_pro_0/ila_pro_0/i_no_d/u_ila/u_trig/u_tm/g_nmu/2/u_m/i_srlt_eq_1/u_mce"
(ROM) removed.
Loadless block
"U_ila_pro_1/ila_pro_1/i_no_d/u_ila/u_trig/i_srlt_eq_1/gk/0/u_tmev" (ROM)
removed.
Loadless block
"U_ila_pro_1/ila_pro_1/i_no_d/u_ila/u_trig/i_srlt_eq_1/gk/1/u_tmev" (ROM)
removed.
Loadless block
"U_ila_pro_1/ila_pro_1/i_no_d/u_ila/u_trig/i_srlt_eq_1/gk/2/u_tmev" (ROM)
removed.
Loadless block "U_ila_pro_1/ila_pro_1/i_no_d/u_ila/u_trig/i_srlt_eq_1/u_tme"
(ROM) removed.
Loadless block
"U_ila_pro_1/ila_pro_1/i_no_d/u_ila/u_trig/u_tc/i_srlt_eq_1/gi/1/u_lut" (ROM)
removed.
 The signal "U_ila_pro_1/i_no_d/u_ila/u_trig/cfg_trigcond_en_vec_14" is loadless
and has been removed.
  Loadless block
"U_ila_pro_1/ila_pro_1/i_no_d/u_ila/u_trig/i_srlt_eq_1/gi/1/u_tcev" (ROM)
removed.
Loadless block
"U_ila_pro_1/ila_pro_1/i_no_d/u_ila/u_trig/u_tc/i_srlt_eq_1/gi/2/u_lut" (ROM)
removed.
 The signal "U_ila_pro_1/i_no_d/u_ila/u_trig/cfg_trigcond_en_vec_13" is loadless
and has been removed.
  Loadless block
"U_ila_pro_1/ila_pro_1/i_no_d/u_ila/u_trig/i_srlt_eq_1/gi/2/u_tcev" (ROM)
removed.
Loadless block
"U_ila_pro_1/ila_pro_1/i_no_d/u_ila/u_trig/u_tc/i_srlt_eq_1/gi/3/u_lut" (ROM)
removed.
 The signal "U_ila_pro_1/i_no_d/u_ila/u_trig/cfg_trigcond_en_vec_12" is loadless
and has been removed.
  Loadless block
"U_ila_pro_1/ila_pro_1/i_no_d/u_ila/u_trig/i_srlt_eq_1/gi/3/u_tcev" (ROM)
removed.
Loadless block
"U_ila_pro_1/ila_pro_1/i_no_d/u_ila/u_trig/u_tc/i_srlt_eq_1/gi/4/u_lut" (ROM)
removed.
 The signal "U_ila_pro_1/i_no_d/u_ila/u_trig/cfg_trigcond_en_vec_11" is loadless
and has been removed.
  Loadless block
"U_ila_pro_1/ila_pro_1/i_no_d/u_ila/u_trig/i_srlt_eq_1/gi/4/u_tcev" (ROM)
removed.
Loadless block
"U_ila_pro_1/ila_pro_1/i_no_d/u_ila/u_trig/u_tm/g_nmu/0/u_m/i_srlt_eq_1/gi/0/u_m
cev" (ROM) removed.
Loadless block
"U_ila_pro_1/ila_pro_1/i_no_d/u_ila/u_trig/u_tm/g_nmu/0/u_m/i_srlt_eq_1/gi/1/u_m
cev" (ROM) removed.
Loadless block
"U_ila_pro_1/ila_pro_1/i_no_d/u_ila/u_trig/u_tm/g_nmu/0/u_m/i_srlt_eq_1/gi/2/u_m
cev" (ROM) removed.
Loadless block
"U_ila_pro_1/ila_pro_1/i_no_d/u_ila/u_trig/u_tm/g_nmu/0/u_m/i_srlt_eq_1/u_mce"
(ROM) removed.
The signal "icon_control0<10>" is sourceless and has been removed.
The signal "icon_control0<11>" is sourceless and has been removed.
The signal "icon_control0<15>" is sourceless and has been removed.
The signal "icon_control0<16>" is sourceless and has been removed.
The signal "icon_control0<17>" is sourceless and has been removed.
The signal "icon_control0<18>" is sourceless and has been removed.
The signal "icon_control0<7>" is sourceless and has been removed.
The signal "icon_control0<23>" is sourceless and has been removed.
The signal "icon_control0<24>" is sourceless and has been removed.
The signal "icon_control0<25>" is sourceless and has been removed.
The signal "icon_control0<26>" is sourceless and has been removed.
The signal "icon_control0<27>" is sourceless and has been removed.
The signal "icon_control0<30>" is sourceless and has been removed.
The signal "icon_control0<28>" is sourceless and has been removed.
The signal "icon_control0<31>" is sourceless and has been removed.
The signal "icon_control0<29>" is sourceless and has been removed.
The signal "icon_control0<32>" is sourceless and has been removed.
The signal "icon_control0<33>" is sourceless and has been removed.
The signal "icon_control0<34>" is sourceless and has been removed.
The signal "icon_control0<35>" is sourceless and has been removed.
The signal "icon_control1<10>" is sourceless and has been removed.
The signal "icon_control1<11>" is sourceless and has been removed.
The signal "icon_control1<15>" is sourceless and has been removed.
The signal "icon_control1<16>" is sourceless and has been removed.
The signal "icon_control1<17>" is sourceless and has been removed.
The signal "icon_control1<18>" is sourceless and has been removed.
The signal "icon_control1<21>" is sourceless and has been removed.
The signal "icon_control1<7>" is sourceless and has been removed.
The signal "icon_control1<22>" is sourceless and has been removed.
The signal "icon_control1<23>" is sourceless and has been removed.
The signal "icon_control1<24>" is sourceless and has been removed.
The signal "icon_control1<25>" is sourceless and has been removed.
The signal "icon_control1<26>" is sourceless and has been removed.
The signal "icon_control1<27>" is sourceless and has been removed.
The signal "icon_control1<30>" is sourceless and has been removed.
The signal "icon_control1<28>" is sourceless and has been removed.
The signal "icon_control1<31>" is sourceless and has been removed.
The signal "icon_control1<29>" is sourceless and has been removed.
The signal "icon_control1<32>" is sourceless and has been removed.
The signal "icon_control1<33>" is sourceless and has been removed.
The signal "icon_control1<34>" is sourceless and has been removed.
The signal "icon_control1<35>" is sourceless and has been removed.
The signal "U_icon_pro/u_icon/icommand_sel_12" is sourceless and has been
removed.
 Sourceless block "U_icon_pro/icon_pro/u_icon/u_ctrl_out/f_ncp/1/f_cmd/3/u_lce"
(ROM) removed.