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📄 prescale_counter.mrp

📁 Xilinx ISE 官方源代码盘 第五章
💻 MRP
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Release 5.1.02i - Map F.25Xilinx Mapping Report File for Design 'prescale_counter'Design Information------------------Command Line   : C:/Xilinx/bin/nt/map.exe -quiet -p xcv100e-bg352-6 -cm area -pr
b -k 4 -c 100 -tx off -o prescale_counter_map.ncd prescale_counter.ngd
prescale_counter.pcf Target Device  : xv100eTarget Package : bg352Target Speed   : -6Mapper Version : virtexe -- $Revision: 1.4 $Mapped Date    : Sat Dec 28 11:52:10 2002Design Summary--------------   Number of errors:      0   Number of warnings:    0   Number of Slices:                 18 out of  1,200    1%   Number of Slices containing      unrelated logic:                0 out of     18    0%   Number of Slice Flip Flops:       32 out of  2,400    1%   Total Number 4 input LUTs:        19 out of  2,400    1%      Number used as LUTs:                          4      Number used as a route-thru:                 15   Number of bonded IOBs:            33 out of    196   16%   Number of GCLKs:                   1 out of      4   25%   Number of GCLKIOBs:                1 out of      4   25%Total equivalent gate count for design:  454Additional JTAG gate count for IOBs:  1,632Peak Memory Usage:  51 MBTable of Contents-----------------Section 1 - ErrorsSection 2 - WarningsSection 3 - InformationalSection 4 - Removed Logic SummarySection 5 - Removed LogicSection 6 - IOB PropertiesSection 7 - RPMsSection 8 - Guide ReportSection 9 - Area Group SummarySection 10 - Modular Design SummarySection 1 - Errors------------------Section 2 - Warnings--------------------Section 3 - Informational-------------------------INFO:LIT:95 - All of the external outputs in this design are using slew rate
   limited output drivers. The delay on speed critical outputs can be
   dramatically reduced by designating them as fast outputs in the schematic.Section 4 - Removed Logic Summary---------------------------------   2 block(s) optimized awaySection 5 - Removed Logic-------------------------Optimized Block(s):TYPE 		BLOCKGND 		XST_GNDVCC 		XST_VCCTo enable printing of redundant blocks removed and signals merged, set the
detailed map report option and rerun map.Section 6 - IOB Properties--------------------------+------------------------------------------------------------------------------------------------------------------------+| IOB Name                           | Type    | Direction | IO Standard | Drive    | Slew | Reg (s)  | Resistor | IOB   ||                                    |         |           |             | Strength | Rate |          |          | Delay |+------------------------------------------------------------------------------------------------------------------------+| clk                                | GCLKIOB | INPUT     | LVTTL       |          |      |          |          |       || counter<0>                         | IOB     | OUTPUT    | LVTTL       | 12       | SLOW |          |          |       || counter<1>                         | IOB     | OUTPUT    | LVTTL       | 12       | SLOW |          |          |       || counter<2>                         | IOB     | OUTPUT    | LVTTL       | 12       | SLOW |          |          |       || counter<3>                         | IOB     | OUTPUT    | LVTTL       | 12       | SLOW |          |          |       || counter<4>                         | IOB     | OUTPUT    | LVTTL       | 12       | SLOW |          |          |       || counter<5>                         | IOB     | OUTPUT    | LVTTL       | 12       | SLOW |          |          |       || counter<6>                         | IOB     | OUTPUT    | LVTTL       | 12       | SLOW |          |          |       || counter<7>                         | IOB     | OUTPUT    | LVTTL       | 12       | SLOW |          |          |       || counter<8>                         | IOB     | OUTPUT    | LVTTL       | 12       | SLOW |          |          |       || counter<9>                         | IOB     | OUTPUT    | LVTTL       | 12       | SLOW |          |          |       || counter<10>                        | IOB     | OUTPUT    | LVTTL       | 12       | SLOW |          |          |       || counter<11>                        | IOB     | OUTPUT    | LVTTL       | 12       | SLOW |          |          |       || counter<12>                        | IOB     | OUTPUT    | LVTTL       | 12       | SLOW |          |          |       || counter<13>                        | IOB     | OUTPUT    | LVTTL       | 12       | SLOW |          |          |       || counter<14>                        | IOB     | OUTPUT    | LVTTL       | 12       | SLOW |          |          |       || counter<15>                        | IOB     | OUTPUT    | LVTTL       | 12       | SLOW |          |          |       || counter<16>                        | IOB     | OUTPUT    | LVTTL       | 12       | SLOW |          |          |       || counter<17>                        | IOB     | OUTPUT    | LVTTL       | 12       | SLOW |          |          |       || counter<18>                        | IOB     | OUTPUT    | LVTTL       | 12       | SLOW |          |          |       || counter<19>                        | IOB     | OUTPUT    | LVTTL       | 12       | SLOW |          |          |       || counter<20>                        | IOB     | OUTPUT    | LVTTL       | 12       | SLOW |          |          |       || counter<21>                        | IOB     | OUTPUT    | LVTTL       | 12       | SLOW |          |          |       || counter<22>                        | IOB     | OUTPUT    | LVTTL       | 12       | SLOW |          |          |       || counter<23>                        | IOB     | OUTPUT    | LVTTL       | 12       | SLOW |          |          |       || counter<24>                        | IOB     | OUTPUT    | LVTTL       | 12       | SLOW |          |          |       || counter<25>                        | IOB     | OUTPUT    | LVTTL       | 12       | SLOW |          |          |       || counter<26>                        | IOB     | OUTPUT    | LVTTL       | 12       | SLOW |          |          |       || counter<27>                        | IOB     | OUTPUT    | LVTTL       | 12       | SLOW |          |          |       || counter<28>                        | IOB     | OUTPUT    | LVTTL       | 12       | SLOW |          |          |       || counter<29>                        | IOB     | OUTPUT    | LVTTL       | 12       | SLOW |          |          |       || counter<30>                        | IOB     | OUTPUT    | LVTTL       | 12       | SLOW |          |          |       || counter<31>                        | IOB     | OUTPUT    | LVTTL       | 12       | SLOW |          |          |       || reset                              | IOB     | INPUT     | LVTTL       |          |      |          |          |       |+------------------------------------------------------------------------------------------------------------------------+Section 7 - RPMs----------------Section 8 - Guide Report------------------------Guide not run on this design.Section 9 - Area Group Summary------------------------------No area groups were found in this design.Section 10 - Modular Design Summary-----------------------------------Modular Design not used for this design.

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