📄 xstdemo_vlog_prj.gfl
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# Verilog : PDCL (jhdparse)
__projnav/cnt_vlog_jhdparse_tcl.rsp
# Verilog : PDCL (jhdparse)
__projnav/cnt_vlog_jhdparse_tcl.rsp
# Check Syntax
cnt_vlog.stx
# xst flow : RunXST
cnt_vlog.syr
cnt_vlog.ngr
cnt_vlog.prj
cnt_vlog.sprj
cnt_vlog.ana
cnt_vlog.stx
cnt_vlog.cmd_log
# Verilog : PDCL (jhdparse)
__projnav/cnt_vlog_jhdparse_tcl.rsp
# Check Syntax
cnt_vlog.stx
# Check Syntax
cnt_vlog.stx
# xst flow : Analyze Hierarchy
cnt_vlog.ana
cnt_vlog.ana
# xst flow : RunXST
cnt_vlog.syr
cnt_vlog.ngr
cnt_vlog.prj
cnt_vlog.sprj
cnt_vlog.ana
cnt_vlog.stx
cnt_vlog.cmd_log
# View RTL Schematic
cnt_vlog.ngr
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