init.s

ARMS3C44B0X的起动代码

	get R44b0.s
	get Option.s
	
	
;// Interrupt Control

INTPND	equ	0x01e00004
INTMOD	equ	0x01e00008
INTMSK	equ	0x01e0000c
I_ISPR	equ	0x01e00020
I_CMST	equ	0x01e0001c

;// Watch dog timer
WTCON 	equ	0x01d30000


;//Clock Controller
PLLCON	    EQU	0x01d80000
CLKCON	    EQU	0x01d80004
LOCKTIME    EQU	0x01d8000c	


;//Memory Controller
REFRESH	    EQU 0x01c80024	


;//	Pre-defined constans
USERMODE	equ	0x10
FIQMODE	equ	0x11
IRQMODE	equ	0x12
SVCMODE	equ	0x13
ABORTMODE	equ 0x17
UNDEFMODE	equ	0x1b

MODEMASK	equ 0x1f

NOINT	equ	0xc0

IRQINT	equ	0x80
FIQINT	equ	0x40

	IMPORT	|Image$$RO$$Limit|  ;// End of ROM code (=start of ROM data)
    IMPORT	|Image$$RW$$Base|   ;// Base of RAM to initialise
    IMPORT	|Image$$ZI$$Base|   ;// Base and limit of area
    IMPORT	|Image$$ZI$$Limit|  ;// to zero initialise

    IMPORT  Main    ; The main entry of mon program 

	macro
$HandlerLabel	HANDLER	$HandleLabel

$HandlerLabel
	sub sp,sp,#4
	stmfd	sp!,{r0}
	ldr	r0,=$HandleLabel
	ldr	r0,[r0]
	str	r0,[sp,#4]
	ldmfd	sp!,{r0,pc}
	mend


;/******************************
;	Init 
;********************************/

	area Init,code,readonly
	
	
	entry
	
	b	ResetHandler
	b	UndefHandler
	b	SWIHandler
	b	PAbortHandler
	b	DAbortHandler
	b	.
	b	IRQHandler
	b	FIQHandler

	LTORG
FIQHandler	HANDLER HandleFIQ
IRQHandler	HANDLER HandleIRQ
UndefHandler	HANDLER HandleUndef
SWIHandler	HANDLER HandleSWI
DAbortHandler	HANDLER HandleDAbort
PAbortHandler	HANDLER HandlePAbort

HandlerADC	HANDLER HandleADC
HandlerRTC	HANDLER HandleRTC
HandlerUTXD1	HANDLER HandleUTXD1
HandlerUTXD0	HANDLER HandleUTXD0
HandlerSIO	HANDLER HandleSIO
HandlerIIC	HANDLER HandleIIC
HandlerURXD1	HANDLER HandleURXD1
HandlerURXD0	HANDLER HandleURXD0
HandlerTIMER5	HANDLER HandleTIMER5
HandlerTIMER4	HANDLER HandleTIMER4
HandlerTIMER3	HANDLER HandleTIMER3
HandlerTIMER2	HANDLER HandleTIMER2
HandlerTIMER1	HANDLER HandleTIMER1
HandlerTIMER0	HANDLER HandleTIMER0
HandlerUERR01	HANDLER HandleUERR01
HandlerWDT	HANDLER HandleWDT
HandlerBDMA1	HANDLER HandleBDMA1
HandlerBDMA0	HANDLER HandleBDMA0
HandlerZDMA1	HANDLER HandleZDMA1
HandlerZDMA0	HANDLER HandleZDMA0
HandlerTICK	HANDLER HandleTICK
HandlerEINT4567	HANDLER HandleEINT4567
HandlerEINT3	HANDLER HandleEINT3
HandlerEINT2	HANDLER HandleEINT2
HandlerEINT1	HANDLER HandleEINT1
HandlerEINT0	HANDLER HandleEINT0
;/**********************************************
;	non-vector IRQ interrupt mode using I_ISPR
;
;***********************************************/	
IRQISRI
	sub	sp,sp,#4
	stmfd	sp!,{r8-r9}
	
	ldr r9,	=I_ISPR
	ldr	r9,[r9]
	mov	r8,#0x0
0	movs	r9,	r9,	lsr #1
	bcs	%F1
	add	r8,	r8,	#4
	b	%B0
	
1	ldr	r9,	=HandlerADC
	add	r9,	r9,	r8
	ldr	r9,	[r9]
	str	r9,	[sp,#8]
	ldmfd	sp!,{r8-r9,pc}
	
	
;/**********************************************
;	ResetHandler for debug
;
;************************************************/
	
ResetHandler
	;//	First:watch dog disable
	ldr	r0,=WTCON	
	ldr	r1,=0x0
	str	r1,[r0]
	
	;//	Second:disable interrupt
	ldr r0,=INTMSK
	ldr r1,=0x07ffffff   ;//all interrupt disable
	str r1,[r0]	
	
	;//Third:set clock control registers
	ldr	r0,=LOCKTIME	
	ldr	r1,=2500    ;// count = t_lock * Fin (t_lock=250us, Fin=10MHz) = 2500
    ; ldr	r1,=800	;// count = t_lock * Fin (t_lock=200us, Fin=4MHz) = 800
    str	r1,[r0]
    
    [ PLLONSTART
	ldr	r0,=PLLCON			;temporary setting of PLL
	ldr	r1,=((M_DIV<<12)+(P_DIV<<4)+S_DIV)	;Fin=10MHz,Fout=60MHz
	str	r1,[r0]
    ]
    
    ldr	r0,=CLKCON
    ldr r1,=0x7ff8  ;//All unit block CLK enable
    str	r1,[r0]
    
	;//Fourth:	Set memory control registers
	ldr	r0,=SMRDATA
	ldmia	r0,{r1-r13}
	ldr	r0,=rBWSCON  
	;//ldr r0,=BWSCON
	stmia r0,{r1-r13}
	
	;//Fifth:	Initialize stacks
	ldr	sp,=SVCStack   ;//initialize SVC stack
	bl	InitStacks
	
	;//Sixth:	setup IRQ handler
	ldr r0,=HandleIRQ  ;//This routine is need
	ldr r1,=IRQISRI	 ;// if there isnot 'subs pc,lr,#4 0x18,0x1c
	str r1,[r0]
	
	;//Seventh:		
;/*****************************************************
;	Copy and paste RW data/zero initialized data
;*****************************************************/
	ldr	r0,=|Image$$RO$$Limit|  ;//Get pointer to ROW data
	ldr r1,=|Image$$RW$$Base|	;//and RAM copy
	ldr	r3,=|Image$$ZI$$Base|
	;//Zero init base=>top of initialized data
	
	cmp r0,r1 ;//Check that they are different
	beq	%F0
0
	cmp r1,r3;//copy init data
	ldrcc	r2,[r0],#4;//-->ldrcc r2,[r0]+add r0,r0,#4
	strcc   r2,[r1],#4;//-->strcc r2,[r1]+add r1,r1,#4
	bcc	%B0
1
	ldr r1,=|Image$$ZI$$Limit|;//Top of zero init segment
	mov r2,#0
2
	cmp	r3,r1	;//Zero init
	strcc r2,[r3],#4
	bcc	%B2
	
	
	bl Main  ;//Do not use main() because ..........
	b	.
	
	
	
;/************************************************
;			Initialize Stacks
;	Do not usr DRAM,such as stmfd,ldmfd......
;	SVC stack is initialized before
;	Under toolkit ver 2.50	,'msr cpsr,r1' can be 
;	used instead of 'msr cpsr_cxsf,r1' 
;*************************************************/

InitStacks
	;//Undefmode
	mrs	r0,cpsr
	bic	r0,r0,#MODEMASK
	orr	r1,r0,#UNDEFMODE|NOINT
	msr	cpsr_cxsf,	r1
	ldr	sp,=UndefStack
	
	;//Abortmode
	orr r1,r0,#ABORTMODE|NOINT
	msr	cpsr_cxsf,r1
	ldr sp,=AbortStack
	
	;//IRQmode
	orr r1,r0,#IRQMODE|NOINT
	msr cpsr_cxsf,r1
	ldr sp,=IRQStack
	
	;//FIQmode
	orr r1,r0,#FIQMODE|NOINT
	msr cpsr_cxsf,r1
	ldr sp,=FIQStack
	
	;//SVCmode
	bic r0,r0,#MODEMASK|NOINT
	orr r1,r0,#SVCMODE
	msr	cpsr_cxsf,r1
	ldr sp,=SVCStack
	
	
	;//	USER mode is not initialized
	mov pc,lr  ;//The LR register may be valid for the mode changes.
	
	
	LTORG
SMRDATA DATA
;/*****************************************************************
;* Memory configuration has to be optimized for best performance *
;* The following parameter is not optimized.                     *
;*****************************************************************/

;//*** memory access cycle parameter strategy ***
;// 1) Even FP-DRAM, EDO setting has more late fetch point by half-clock
;// 2) The memory settings,here, are made the safe parameters even at 66Mhz.
;// 3) FP-DRAM Parameters:tRCD=3 for tRAC, tcas=2 for pad delay, tcp=2 for bus load.
;// 4) DRAM refresh rate is for 40Mhz. 

   
	DCD 0x11110090	;Bank0=OM[1:0], Bank1~Bank7=16bit, bank2=8bit;
 	DCD ((B0_Tacs<<13)+(B0_Tcos<<11)+(B0_Tacc<<8)+(B0_Tcoh<<6)+(B0_Tah<<4)+(B0_Tacp<<2)+(B0_PMC))	;GCS0
	DCD ((B1_Tacs<<13)+(B1_Tcos<<11)+(B1_Tacc<<8)+(B1_Tcoh<<6)+(B1_Tah<<4)+(B1_Tacp<<2)+(B1_PMC))	;GCS1 
	DCD ((B2_Tacs<<13)+(B2_Tcos<<11)+(B2_Tacc<<8)+(B2_Tcoh<<6)+(B2_Tah<<4)+(B2_Tacp<<2)+(B2_PMC))	;GCS2
	DCD ((B3_Tacs<<13)+(B3_Tcos<<11)+(B3_Tacc<<8)+(B3_Tcoh<<6)+(B3_Tah<<4)+(B3_Tacp<<2)+(B3_PMC))	;GCS3
	DCD ((B4_Tacs<<13)+(B4_Tcos<<11)+(B4_Tacc<<8)+(B4_Tcoh<<6)+(B4_Tah<<4)+(B4_Tacp<<2)+(B4_PMC))	;GCS4
	DCD ((B5_Tacs<<13)+(B5_Tcos<<11)+(B5_Tacc<<8)+(B5_Tcoh<<6)+(B5_Tah<<4)+(B5_Tacp<<2)+(B5_PMC))	;GCS5
	DCD ((B6_MT<<15)+(B6_Trcd<<2)+(B6_SCAN))	;GCS6
	DCD ((B7_MT<<15)+(B7_Trcd<<2)+(B7_SCAN))	;GCS7
	DCD ((REFEN<<23)+(TREFMD<<22)+(Trp<<20)+(Trc<<18)+(Tchr<<16)+REFCNT)	;REFRESH RFEN=1, TREFMD=0, trp=3clk, trc=5clk, tchr=3clk,count=1019
	DCD 0x16				;SCLK power mode, BANKSIZE 32M/32M
	DCD 0x20			;MRSR6 CL=2clk
	DCD 0x20			;MRSR7

	ALIGN

;/******************************************
;
;	Init stack	parameter
;
;*******************************************/
	
	area	RamData, data,readwrite
	
	^	(_ISR_STARTADDRESS-0x500)
	
UserStack 	#	256	;c1(c7)ffa00
SVCStack	#	256
UndefStack	#	256
AbortStack	#	256
IRQStack	#	256
FIQStack	#	0	
	
	
	^	_ISR_STARTADDRESS
	
HandleReset	#	4
HandleUndef #	4
HandleSWI	#	4
HandlePAbort	#	4
HandleDAbort	#	4
HandleReserved	#	4
HandleIRQ	#	4
HandleFIQ	#	4

;/*Do not use the label 'IntVectorTable'
;because armasm.exe can not recognize this label correctly
;the value is different with an address you think it may be
;IntVectorTable
;*/	
HandleADC	#	4
HandleRTC	#	4
HandleUTXD1	#	4
HandleUTXD0	#	4
HandleSIO	#	4
HandleIIC	#	4
HandleURXD1	#	4
HandleURXD0	#	4
HandleTIMER5	#	4	
HandleTIMER4	#	4
HandleTIMER3	#	4
HandleTIMER2	#	4
HandleTIMER1	#	4
HandleTIMER0	#	4
HandleUERR01	#	4
HandleWDT	#	4
HandleBDMA1	#	4
HandleBDMA0	#	4
HandleZDMA1	#	4
HandleZDMA0	#	4
HandleTICK	#	4
HandleEINT4567	#	4
HandleEINT3	#	4
HandleEINT2	#	4
HandleEINT1	#	4
HandleEINT0	#	4	;0xc1(c7)fff84

	
	
	end