uartdrv.h

coldfire5206芯片的boot程序

#ifndef UARTDRV_H
#define UARTDRV_H

#define  UART1_AS_COMMON_UART
//#define  UART2_AS_COMMON_UART

#define	RECEIVE_BUF_LENGTH   4000
#define	TRANSMIT_BUF_LENGTH  4000

typedef enum	//升级端口号    含义
{
	CPU_UART_1 = 0x00,		//	0x00      CPU 串口0
		CPU_UART_2,		//	0x01      CPU 串口1
		FPGA_UART_0,	//	0x02      FPGA 串口0
		FPGA_UART_1,	//	0x03      FPGA 串口1
		FPGA_UART_2,	//	0x04      FPGA 串口2
		FPGA_UART_3,	//	0x05      FPGA 串口3
		FPGA_UART_4,	//	0x06      FPGA 串口4
		FPGA_UART_5,	//	0x07      FPGA 串口5
		FPGA_UART_6,	//	0x08      FPGA 串口6
		FPGA_UART_7,	//	0x09      FPGA 串口7
		
		UART_MAX		
} UART_ID;

typedef	enum
{
  UART_DISABLE,
  UART_ENABLE
}UARTOPERATION;


typedef enum
{
  BR_2400,   // 2400 BPS
  BR_4800,   // 4800 BPS
  BR_9600,   // 9600 BPS
  BR_19200,  // 19200 BPS
  BR_38400,  // 38400 BPS
  BR_57600,  // 57600 BPS
  BR_76800,  // 76800 BPS
  BR_115200, // 115200 BPS
  BR_MAX
}BAUDRATE;

typedef enum
{
  DATABITS_5,
  DATABITS_6,
  DATABITS_7,
  DATABITS_8,
  DATABITS_MAX
}DATABITS;

typedef enum
{
  STOPBITS_1,
  STOPBITS_1_5,
  STOPBITS_MAX
}STOPBITS;

typedef enum
{
  PARITY_ODD,
  PARITY_EVEN,
  PARITY_NO,
  PARITY_MULTIDROP,
  PARITY_MAX
}PARITYMODE;

typedef struct
{
   UINT   receiveErrorInfo;
   UINT   receivedBytes;
   BOOL   isTxBufferEmpty;
   //BOOL isRxBufferEmpty;   deleted for unused variable.
}UARTINFO;

typedef struct
{
   BAUDRATE    baudRate;
   PARITYMODE  parity;
   DATABITS    dataBits;
   STOPBITS    stopBits;
   BOOL        useBufferedReceive;
}UARTCONFIG;

typedef struct
{
   UARTINFO* uartInfo;

   VOID  (*Reset)( VOID );
   INT16   (*WriteString)(UCHAR* string, UINT16 str_len);
   BOOL  (*WriteByte)(UCHAR byte);
   INT16   (*ReadString)(UCHAR* string, UINT16 str_len);
   BOOL  (*ReadByte)( UCHAR* data );

   VOID (*ReceiveControl )(UCHAR operation);
   VOID (*TransmitControl)(UCHAR operation);
   VOID (*SetConfig      )( const UARTCONFIG* config );

}UARTFORMODULE;

typedef struct _fpga_uart_all_info__
{
	// uart register
	UCHAR* cr;
	UCHAR* dr;
	UCHAR* br;
	UCHAR set;

	// uart error counter
	UINT16  parityError;
	UINT16  frameError;
	UINT16  overRunError;
	
	// status
	UINT   receivedBytes;
	UCHAR  isTxBufferEmpty;

	// receive and transmit buffer
	UCHAR receiveBuffer[RECEIVE_BUF_LENGTH];
	UCHAR*  receiveOutPtr;
	UCHAR*  receiveInPtr;
	UCHAR*  receiveBufHead;
	UCHAR*  receiveBufTail;
	UCHAR   transmitBuffer[TRANSMIT_BUF_LENGTH];
	UCHAR*  transmitOutPtr;
	UCHAR*  transmitInPtr;
	UCHAR*  transmitBufHead;
	UCHAR*  transmitBufTail;
}	FPGAUARTALLINFO;

BOOL InitUart(UCHAR uart_id, const UARTCONFIG* config, UCHAR enable_tx, UCHAR enable_rx);
INT16 UartWriteString(UCHAR uart_id, UCHAR* string, UINT16 str_len);
INT16 UartReadString(UCHAR uart_id, UCHAR* string, UINT16 str_len);
void ConfigUart();

VOID  FpgaUartSetConfig( UINT16 fpga_uart_index,  const UARTCONFIG* config );
VOID  FpgaUartReset( UINT16 fpga_uart_index );
INT16  FpgaUartWriteString( UINT16 fpga_uart_index, UCHAR* string, UINT16 str_len);
INT16  FpgaUartReadString( UINT16 fpga_uart_index, UCHAR* data, UINT16 length);
VOID  FpgaUartReceiveControl( UINT16 fpga_uart_index, UCHAR operation);
VOID  FpgaUartTransmitControl( UINT16 fpga_uart_index, UCHAR operation);
VOID  FpgaUartISR( UINT16 fpga_uart_index );

VOID  ClearUartForModule(UARTFORMODULE* uart);
VOID  InitAllUarts( VOID );
VOID  EnableAllFpgaUartsReceiver( VOID );
extern UARTFORMODULE  gUartForSlots[10];
extern UINT32 g_alUartIMRTable[10];
#endif