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📄 pipemult.map.qmsg

📁 该源码实现了一个8*8位的乘法器
💻 QMSG
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{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis " "Info: Running Quartus II Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 4.2 Build 178 01/19/2005 Service Pack 1 SJ Web Edition " "Info: Version 4.2 Build 178 01/19/2005 Service Pack 1 SJ Web Edition" {  } {  } 0} { "Info" "IQEXE_START_BANNER_TIME" "Tue Mar 28 21:46:09 2006 " "Info: Processing started: Tue Mar 28 21:46:09 2006" {  } {  } 0}  } {  } 4}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --import_settings_files=on --export_settings_files=off pipemult -c pipemult " "Info: Command: quartus_map --import_settings_files=on --export_settings_files=off pipemult -c pipemult" {  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "pipemult.bdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file pipemult.bdf" { { "Info" "ISGN_ENTITY_NAME" "1 pipemult " "Info: Found entity 1: pipemult" {  } { { "pipemult.bdf" "" { Schematic "E:/Quartus/pipemult/pipemult.bdf" { } } }  } 0}  } {  } 0}
{ "Info" "ISGN_SEARCH_FILE" "lpm_ram_dp0.v 1 1 " "Info: Using design file lpm_ram_dp0.v, which is not specified as a design file for the current project, but contains definitions for 1 design units and 1 entities in project" { { "Info" "ISGN_ENTITY_NAME" "1 lpm_ram_dp0 " "Info: Found entity 1: lpm_ram_dp0" {  } { { "lpm_ram_dp0.v" "" { Text "E:/Quartus/pipemult/lpm_ram_dp0.v" 42 -1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "d:/altera/quartus42sp1/libraries/megafunctions/altsyncram.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file d:/altera/quartus42sp1/libraries/megafunctions/altsyncram.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 altsyncram " "Info: Found entity 1: altsyncram" {  } { { "altsyncram.tdf" "" { Text "d:/altera/quartus42sp1/libraries/megafunctions/altsyncram.tdf" 431 1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/altsyncram_g691.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file db/altsyncram_g691.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 altsyncram_g691 " "Info: Found entity 1: altsyncram_g691" {  } { { "db/altsyncram_g691.tdf" "" { Text "E:/Quartus/pipemult/db/altsyncram_g691.tdf" 40 1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_SEARCH_FILE" "mult.v 1 1 " "Info: Using design file mult.v, which is not specified as a design file for the current project, but contains definitions for 1 design units and 1 entities in project" { { "Info" "ISGN_ENTITY_NAME" "1 mult " "Info: Found entity 1: mult" {  } { { "mult.v" "" { Text "E:/Quartus/pipemult/mult.v" 42 -1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "d:/altera/quartus42sp1/libraries/megafunctions/lpm_mult.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file d:/altera/quartus42sp1/libraries/megafunctions/lpm_mult.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 lpm_mult " "Info: Found entity 1: lpm_mult" {  } { { "lpm_mult.tdf" "" { Text "d:/altera/quartus42sp1/libraries/megafunctions/lpm_mult.tdf" 280 1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/mult_m5q.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file db/mult_m5q.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 mult_m5q " "Info: Found entity 1: mult_m5q" {  } { { "db/mult_m5q.tdf" "" { Text "E:/Quartus/pipemult/db/mult_m5q.tdf" 38 1 0 } }  } 0}  } {  } 0}
{ "Info" "ISCL_SCL_TM_SUMMARY" "61 " "Info: Implemented 61 device resources after synthesis - the final resource count might be different" { { "Info" "ISCL_SCL_TM_IPINS" "28 " "Info: Implemented 28 input pins" {  } {  } 0} { "Info" "ISCL_SCL_TM_OPINS" "16 " "Info: Implemented 16 output pins" {  } {  } 0} { "Info" "ISCL_SCL_TM_RAMS" "16 " "Info: Implemented 16 RAM segments" {  } {  } 0} { "Info" "ISCL_SCL_TM_DSP_ELEM" "1 " "Info: Implemented 1 DSP elements" {  } {  } 0}  } {  } 0}
{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 0 s " "Info: Quartus II Analysis & Synthesis was successful. 0 errors, 0 warnings" { { "Info" "IQEXE_END_BANNER_TIME" "Tue Mar 28 21:46:12 2006 " "Info: Processing ended: Tue Mar 28 21:46:12 2006" {  } {  } 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:04 " "Info: Elapsed time: 00:00:04" {  } {  } 0}  } {  } 0}

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