📄 pipemult.map.rpt
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The equations can be found in E:/Quartus/pipemult/pipemult.map.eqn.
+---------------------------------------------------------------------------------------------------------------------------+
; Analysis & Synthesis Source Files Read ;
+----------------------------------+-----------------+----------------------------------------------------------------------+
; File Name with User-Entered Path ; Used in Netlist ; File Name with Absolute Path ;
+----------------------------------+-----------------+----------------------------------------------------------------------+
; pipemult.bdf ; yes ; E:/Quartus/pipemult/pipemult.bdf ;
; lpm_ram_dp0.v ; yes ; E:/Quartus/pipemult/lpm_ram_dp0.v ;
; altsyncram.tdf ; yes ; d:/altera/quartus42sp1/libraries/megafunctions/altsyncram.tdf ;
; stratix_ram_block.inc ; yes ; d:/altera/quartus42sp1/libraries/megafunctions/stratix_ram_block.inc ;
; lpm_mux.inc ; yes ; d:/altera/quartus42sp1/libraries/megafunctions/lpm_mux.inc ;
; lpm_decode.inc ; yes ; d:/altera/quartus42sp1/libraries/megafunctions/lpm_decode.inc ;
; aglobal42.inc ; yes ; d:/altera/quartus42sp1/libraries/megafunctions/aglobal42.inc ;
; altsyncram.inc ; yes ; d:/altera/quartus42sp1/libraries/megafunctions/altsyncram.inc ;
; a_rdenreg.inc ; yes ; d:/altera/quartus42sp1/libraries/megafunctions/a_rdenreg.inc ;
; altrom.inc ; yes ; d:/altera/quartus42sp1/libraries/megafunctions/altrom.inc ;
; altram.inc ; yes ; d:/altera/quartus42sp1/libraries/megafunctions/altram.inc ;
; altdpram.inc ; yes ; d:/altera/quartus42sp1/libraries/megafunctions/altdpram.inc ;
; altqpram.inc ; yes ; d:/altera/quartus42sp1/libraries/megafunctions/altqpram.inc ;
; db/altsyncram_g691.tdf ; yes ; E:/Quartus/pipemult/db/altsyncram_g691.tdf ;
; mult.v ; yes ; E:/Quartus/pipemult/mult.v ;
; lpm_mult.tdf ; yes ; d:/altera/quartus42sp1/libraries/megafunctions/lpm_mult.tdf ;
; lpm_add_sub.inc ; yes ; d:/altera/quartus42sp1/libraries/megafunctions/lpm_add_sub.inc ;
; multcore.inc ; yes ; d:/altera/quartus42sp1/libraries/megafunctions/multcore.inc ;
; bypassff.inc ; yes ; d:/altera/quartus42sp1/libraries/megafunctions/bypassff.inc ;
; altshift.inc ; yes ; d:/altera/quartus42sp1/libraries/megafunctions/altshift.inc ;
; db/mult_m5q.tdf ; yes ; E:/Quartus/pipemult/db/mult_m5q.tdf ;
+----------------------------------+-----------------+----------------------------------------------------------------------+
+---------------------------------------------+
; Analysis & Synthesis Resource Usage Summary ;
+---------------------------------+-----------+
; Resource ; Usage ;
+---------------------------------+-----------+
; Total combinational functions ; 0 ;
; Total 4-input functions ; 0 ;
; Total 3-input functions ; 0 ;
; Total 2-input functions ; 0 ;
; Total 1-input functions ; 0 ;
; Total 0-input functions ; 0 ;
; Combinational cells for routing ; 0 ;
; Total registers ; 0 ;
; I/O pins ; 44 ;
; Total memory bits ; 512 ;
; DSP block 9-bit elements ; 1 ;
; Maximum fan-out node ; clk1 ;
; Maximum fan-out ; 17 ;
; Total fan-out ; 242 ;
; Average fan-out ; 3.90 ;
+---------------------------------+-----------+
+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Analysis & Synthesis RAM Summary ;
+---------------------------------------------------------------------------------------------+------+------------------+--------------+--------------+--------------+--------------+------+------+
; Name ; Type ; Mode ; Port A Depth ; Port A Width ; Port B Depth ; Port B Width ; Size ; MIF ;
+---------------------------------------------------------------------------------------------+------+------------------+--------------+--------------+--------------+--------------+------+------+
; lpm_ram_dp0:inst1|altsyncram:altsyncram_component|altsyncram_g691:auto_generated|ALTSYNCRAM ; AUTO ; Simple Dual Port ; 32 ; 16 ; 32 ; 16 ; 512 ; None ;
+---------------------------------------------------------------------------------------------+------+------------------+--------------+--------------+--------------+--------------+------+------+
+------------------------------------------------+
; Analysis & Synthesis DSP Block Usage Summary ;
+----------------------------------+-------------+
; Statistic ; Number Used ;
+----------------------------------+-------------+
; Simple Multipliers (9-bit) ; 1 ;
; Simple Multipliers (18-bit) ; 0 ;
; Simple Multipliers (36-bit) ; 0 ;
; Multiply Accumulators (18-bit) ; 0 ;
; Two-Multipliers Adders (9-bit) ; 0 ;
; Two-Multipliers Adders (18-bit) ; 0 ;
; Four-Multipliers Adders (9-bit) ; 0 ;
; Four-Multipliers Adders (18-bit) ; 0 ;
; DSP Blocks ; 0 ;
; DSP Block 9-bit Elements ; 1 ;
+----------------------------------+-------------+
+----------------------------------------------------------------+
; WYSIWYG Cells ;
+--------------------------------------------------------+-------+
; Statistic ; Value ;
+--------------------------------------------------------+-------+
; Number of WYSIWYG cells ; 0 ;
; Number of synthesis-generated cells ; 0 ;
; Number of WYSIWYG LUTs ; 0 ;
; Number of synthesis-generated LUTs ; 0 ;
; Number of WYSIWYG registers ; 0 ;
; Number of synthesis-generated registers ; 0 ;
; Number of cells with combinational logic only ; 0 ;
; Number of cells with registers only ; 0 ;
; Number of cells with combinational logic and registers ; 0 ;
+--------------------------------------------------------+-------+
+------------------------------------------------------+
; General Register Statistics ;
+----------------------------------------------+-------+
; Statistic ; Value ;
+----------------------------------------------+-------+
; Total registers ; 0 ;
; Number of registers using Synchronous Clear ; 0 ;
; Number of registers using Synchronous Load ; 0 ;
; Number of registers using Asynchronous Clear ; 0 ;
; Number of registers using Asynchronous Load ; 0 ;
; Number of registers using Clock Enable ; 0 ;
; Number of registers using Output Enable ; 0 ;
; Number of registers using Preset ; 0 ;
+----------------------------------------------+-------+
+-------------------------------+
; Analysis & Synthesis Messages ;
+-------------------------------+
Info: *******************************************************************
Info: Running Quartus II Analysis & Synthesis
Info: Version 4.2 Build 178 01/19/2005 Service Pack 1 SJ Web Edition
Info: Processing started: Tue Mar 28 21:46:09 2006
Info: Command: quartus_map --import_settings_files=on --export_settings_files=off pipemult -c pipemult
Info: Found 1 design units, including 1 entities, in source file pipemult.bdf
Info: Found entity 1: pipemult
Info: Using design file lpm_ram_dp0.v, which is not specified as a design file for the current project, but contains definitions for 1 design units and 1 entities in project
Info: Found entity 1: lpm_ram_dp0
Info: Found 1 design units, including 1 entities, in source file d:/altera/quartus42sp1/libraries/megafunctions/altsyncram.tdf
Info: Found entity 1: altsyncram
Info: Found 1 design units, including 1 entities, in source file db/altsyncram_g691.tdf
Info: Found entity 1: altsyncram_g691
Info: Using design file mult.v, which is not specified as a design file for the current project, but contains definitions for 1 design units and 1 entities in project
Info: Found entity 1: mult
Info: Found 1 design units, including 1 entities, in source file d:/altera/quartus42sp1/libraries/megafunctions/lpm_mult.tdf
Info: Found entity 1: lpm_mult
Info: Found 1 design units, including 1 entities, in source file db/mult_m5q.tdf
Info: Found entity 1: mult_m5q
Info: Implemented 61 device resources after synthesis - the final resource count might be different
Info: Implemented 28 input pins
Info: Implemented 16 output pins
Info: Implemented 16 RAM segments
Info: Implemented 1 DSP elements
Info: Quartus II Analysis & Synthesis was successful. 0 errors, 0 warnings
Info: Processing ended: Tue Mar 28 21:46:12 2006
Info: Elapsed time: 00:00:04
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